Texas Instruments TPS65111RGE

Overview

TPS65111RGE from Texas Instruments is a triple-output charge pump IC designed for LTPS-LCD bias power in compact portable displays. It delivers fixed 5.0 V (16 mA), 9.0 V (2 mA), and −3.0 V (1 mA) outputs from a 2.4–5.5 V input, features autonomous VCC boost control, <5 mV VCC ripple at 5 mA, and sequential power-up/down timing-enabling reliable operation in smart phones and pocket PCs.

For engineers reviewing the TPS65111RGE datasheet, TPS65111RGE pinout, TPS65111RGE application, or TPS65111RGE equivalent, key selection criteria include verified triple-rail output accuracy (±1.5% on VCC), ultra-low quiescent current (50 µA typ), shutdown current (<1 µA), 24-pin QFN package compatibility, and confirmed LTPS-LCD sequencing behavior under VIN transients.

Technical Context

The TPS65111RGE integrates three independent charge pump regulators: VCC uses autonomous x1/x1.33/x1.5/x2 boost ratio selection based on VIN and VCC setpoint; VDD employs fixed x2 boost from VCC to deliver 9.0 V; VSS uses fixed x−1 inversion from VCC to generate −3.0 V. All outputs are internally regulated with dedicated flying capacitor networks (0.22 µF for VCC; 0.1 µF for VDD/VSS).

Power sequencing is fully autonomous: VCC rises first, followed by VSS at 75% VCC, then VDD at 75% VSS during startup; shutdown reverses the order (VDD → VSS → VCC) with 70% thresholds. The device includes under-voltage lockout (UVLO: 2.2–2.4 V rising threshold), I²C-compatible serial interface (CLK/DATA), and EEPROM power rail (VROM).

Key Specifications

Pinout & Package

TPS65111RGE is housed in a 24-pin VQFN package (RGE drawing) with exposed thermal pad. Pin 1 is CSP1 (VSS flying cap positive terminal); pins 2–8 serve VCC flying capacitor connections; pins 9–12 handle control logic (VIN, DATA, CLK, EN); pins 13–14 are ground references (AGND, VROM); pins 15–21 route VDD flying capacitors; pins 22–24 provide PGND, VSS output, and CSN1 (VSS flying cap negative terminal).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-output LCD bias applications.

Compared with TPS65110RGE and MAX1605EEE+, the TPS65111RGE uniquely balances 5.0 V VCC precision, 9.0 V VDD drive capability, and −3.0 V VSS stability within a thermally optimized 4×4 mm QFN-making it optimal for next-gen compact LTPS displays where size, efficiency, and sequencing autonomy are co-prioritized.

Availability

TPS65111RGE is available at Aetrix Electronics and suitable for smartphone display modules, PDA power subsystems, and portable media player LCD bias circuits requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for TPS65111RGE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in energy-efficient electronics.

The TPS65111RGE belongs to TI's LCD bias power management product line, engineered specifically to replace discrete charge pump solutions in space-constrained LTPS-LCD applications while delivering precise, sequenced, low-ripple triple-rail outputs.

FAQ

What is the maximum output current capability of each rail on the TPS65111RGE?

The TPS65111RGE delivers up to 16 mA from the VCC rail (5.0 V), 2 mA from the VDD rail (9.0 V), and 1 mA from the VSS rail (−3.0 V) under recommended operating conditions. These values are confirmed in the Electrical Characteristics table for TPS65111 outputs, with VCC current specified at IVDD = 2 mA and IVSS = 1 mA. Exceeding these limits may degrade regulation accuracy or increase ripple.

Does the TPS65111RGE support automatic power sequencing during startup and shutdown?

Yes, the TPS65111RGE implements fully autonomous power sequencing: during startup, VCC rises first, followed by VSS at 75% of its nominal value, then VDD at 75% of its nominal value; during shutdown, VDD falls first, then VSS at 70% of nominal, and finally VCC. This behavior is guaranteed even during sudden VIN drops, as documented in the Power-Up and Power-Down Sequencing section.

What external capacitors are required for stable operation of the TPS65111RGE?

The TPS65111RGE requires four 0.22 µF flying capacitors for the VCC charge pump (CCP1/CCN1 through CCP3/CCN3), six 0.1 µF flying capacitors for VDD and VSS (CDP1/CDN1 through CDP3/CDN3 and CSP1/CSN1), plus 4.7 µF (VIN), 2.2 µF (VCC), 1.0 µF (VDD), and 2.2 µF (VSS) output capacitors. These values are specified in the Recommended Operating Conditions table and validated in the Typical Application Circuit.

Is the TPS65111RGE compatible with I²C communication protocols?

The TPS65111RGE features CLK and DATA pins that support I²C-compatible serial interface operation, enabling configuration of the VROM supply and system-level coordination. While not a full I²C slave with addressable registers, its timing and logic levels comply with standard I²C voltage thresholds (VIH ≥ 1.5 V at VI = 3.5–5.5 V; VIL ≤ 0.4 V), allowing direct connection to microcontroller I²C peripherals.

What is the under-voltage lockout (UVLO) threshold for the TPS65111RGE?

The TPS65111RGE has an under-voltage lockout threshold of 2.2 V (typical) to 2.4 V (max) for rising VIN, with 30–100 mV hysteresis. Operation below 2.4 V input is possible only if the device is initially powered above the UVLO threshold; this prevents erratic startup during brown-out conditions and ensures stable regulation once enabled.