Texas Instruments TPS65121RGTR

Overview

TPS65121RGTR from Texas Instruments is a single-inductor quadruple-output DC-DC converter for a-Si and LTPS TFT-LCD displays, delivering independently regulated VMAIN (3.0–5.3 V/25 mA), VGH (up to 20 V/2 mA), VGL (down to −18 V/2 mA), and a fixed 1.8 V auxiliary LDO output. It integrates automatic power sequencing, post-regulated low-ripple VMAIN (5 mV_P-P), and fault protection for gate driver supply rails in portable LCD systems.

For engineers reviewing the TPS65121RGTR datasheet, TPS65121RGTR pinout, TPS65121RGTR application, or TPS65121RGTR equivalent, key selection criteria include its 3×3 mm QFN-16 package, 4.0 MHz switching frequency, ±0.8% VMAIN regulation accuracy, integrated power-down discharge resistors (R_{DIS_VMAIN}/R_{DIS_VGH} = 10 kΩ), and compatibility with ultra-thin 8.2–10 µH inductors.

Technical Context

The TPS65121RGTR employs a free-running variable peak-current PWM control scheme that time-multiplexes a single inductor between BOOT, VGH, and VGL outputs at pseudo-fixed 4.0 MHz frequency. Its architecture enables fast transient response while maintaining high efficiency (up to 83%) across 2.7–5.5 V input and wide output voltage ranges.

VMAIN is post-regulated via an integrated LDO stage using BOOT as input, minimizing dropout (130 mV @ 10 mA) and ripple (5 mV_P-P). The device includes undervoltage lockout (2.15 V falling threshold), internal current limiting (150 mA P-MOS1 limit), and latched fault shutdown triggered by sustained output faults (>100 µs).

Key Specifications

Pinout & Package

TPS65121RGTR uses a 3 × 3 mm, 16-pin QFN package with exposed thermal pad. Pin functions are validated per TI SLVS531A datasheet (Rev. March 2005) and match the TPS65121 variant pin assignment.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar TFT-LCD power management applications.

Compared with TPS65120RGTR and TPS65123RGTR, the TPS65121RGTR uniquely provides a fixed 1.8 V LDO output in a pin-compatible 3×3 mm QFN package-making it optimal for modern low-voltage timing controllers without adding external regulators or redesigning sequencing logic.

Availability

TPS65121RGTR is available at Aetrix Electronics and suitable for smartphone LCD power management, portable GPS display supply, digital still camera LCD backlight driver, and handheld medical instrument display requiring stable component supply and long-term production continuity.

Supply support for TPS65121RGTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in precision power conversion.

The TPS6512x product line was designed specifically for space-constrained a-Si and LTPS TFT-LCD panels in portable consumer electronics, integrating quadruple output generation, automatic sequencing, and ultra-thin inductor compatibility into a single 3×3 mm package.

FAQ

What is the maximum output current capability of the TPS65121RGTR's VMAIN, VGH, and VGL rails?

The TPS65121RGTR delivers up to 25 mA on VMAIN (at ≤5.3 V), 2 mA on VGH (up to 20 V), and 2 mA on VGL (down to −18 V). These values are confirmed in the Electrical Characteristics table (SLVS531A, p.3–4) under "Maximum main output current", "Maximum DC output current" for VGH/VGL, and apply across −40°C to 85°C. Exceeding these currents risks triggering the 50 mA short-circuit limit on VMAIN or violating the 35 mW per-output power constraint.

Does the TPS65121RGTR support programmable power sequencing like the TPS65124RGTR?

No, the TPS65121RGTR implements fixed automatic power sequencing-VGL powers before VGH, and VMAIN enables only after VGL reaches 90% of target. Unlike the TPS65124RGTR, it lacks dedicated ENVGH and ENVGL pins for user-defined sequencing order. This behavior is hardwired in silicon and cannot be modified via external components or configuration registers.

What is the purpose of the GATE pin on the TPS65121RGTR, and how should it be connected?

The GATE pin (Pin 16) is an open-drain output that drives the gate of an external P-channel MOSFET (e.g., Figure 18 in SLVS531A). During normal operation, it is pulled low (via internal 100 kΩ) to turn on the MOSFET and enable power sequencing. During shutdown, it is pulled high to VIN to disable the MOSFET. Leaving GATE unconnected causes undefined sequencing behavior and must be avoided.

Can the TPS65121RGTR operate with input voltages below 2.7 V?

The TPS65121RGTR has a minimum recommended input voltage of 2.7 V for full-load operation, but it can start up at 2.5 V (per "Minimum input voltage for start-up" spec). Below 2.5 V, the undervoltage lockout (UVLO) activates at 2.15 V (falling), disabling all outputs. Sustained operation below 2.7 V may reduce VMAIN accuracy and efficiency, and is not characterized for ripple or load regulation.

How does the TPS65121RGTR achieve low VMAIN ripple, and what is the typical value?

The TPS65121RGTR achieves low VMAIN ripple through post-regulation: the switching stage generates a BOOST voltage, which feeds an integrated LDO that regulates down to the final VMAIN setting. This two-stage approach isolates VMAIN from switching noise. Per the Electrical Characteristics table (p.4), VMAIN output voltage ripple is 5 mV_P-P at 10 mA load with specified output capacitors (C5 = 220 nF).