Texas Instruments TPS65121RGTT
- Part No.:
- TPS65121RGTT
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
TPS65121RGTT.pdf
- Description:
- IC REG CONV TFT LCD 4OUT 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,161
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Product details
Overview
TPS65121RGTT from Texas Instruments is a single-inductor quadruple-output DC-DC converter for amorphous-silicon and LTPS TFT-LCD displays. It delivers independently regulated VMAIN (3.0–5.3 V/25 mA), VGH (up to 20 V/2 mA), VGL (down to −18 V/2 mA), and a fixed 1.8 V auxiliary LDO output, with post-regulated <5 mVP-P ripple on VMAIN and ±0.8% typical accuracy. It serves as the core power supply in compact portable LCD systems.
For engineers reviewing the TPS65121RGTT datasheet, TPS65121RGTT pinout, TPS65121RGTT application, or TPS65121RGTT equivalent, key selection criteria include its 4.0 MHz switching frequency, integrated automatic power sequencing, QFN-16 (3 × 3 × 0.9 mm) package, −40°C to +85°C operating range, and compatibility with low-profile 8.2–10 µH inductors in space-constrained handheld designs.
Technical Context
The TPS65121RGTT employs a free-running variable peak-current PWM control scheme that time-multiplexes a single inductor between BOOT, VGH, and VGL outputs using pseudo-fixed-frequency operation. This architecture enables fast transient response while maintaining high efficiency (up to 83%) across 2.7–5.5 V input and wide output voltage ranges.
VMAIN is post-regulated via an integrated LDO stage to achieve low ripple (<5 mVP-P) and tight regulation (±0.8% typical), while VGH and VGL are independently regulated through feedback pins FBH (1.213 V reference) and FBL (0 V reference). The device includes internal current limiting (150 mA typical P-MOS1 limit), UVLO (2.15 V falling threshold), and fault detection with latched shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion, Li-polymer, or dual-cell alkaline/battery-backed systems without external regulators. |
| VMAIN Output | 3.0 V to 5.3 V / 25 mA - post-regulated by integrated LDO for source driver bias with ≤5 mVP-P ripple at 10 mA load. |
| VGH Output | Up to 20 V / 2 mA - adjustable positive gate drive voltage with ±3% typical accuracy and 1.213 V FBH reference. |
| VGL Output | Down to −18 V / 2 mA - adjustable negative gate drive voltage with ±3% typical accuracy and 0 V FBL reference. |
| Switching Frequency | 4.0 MHz - enables use of ultra-thin, low-cost 8.2 µH or 10 µH inductors and minimizes EMI filter size. |
| Efficiency | Up to 83% - measured at VIN = 3.6 V, VMAIN = 5 V, VGH = 15 V, VGL = −10 V, IBOOT = 20 mA, IGH = IGL = 100 µA. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and consumer portable electronics environments. |
| Package | 16-pin QFN (3 mm × 3 mm × 0.9 mm) - thermally enhanced exposed die pad for reliable power dissipation in compact layouts. |
Pinout & Package
The TPS65121RGTT is housed in a 3 mm × 3 mm × 0.9 mm QFN-16 package with an exposed thermal die pad. Pin 1 is marked by a dot; pins are numbered counterclockwise starting from top-left corner when viewed from top.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable input | Active-high logic control: high enables VMAIN; must be terminated-floating causes undefined behavior. |
| RUN (Pin 2) | Power sequencing control | Active-high signal controlling external P-MOSFET gate driver; initiates converter startup when high. |
| LDOIN (Pin 3) | Auxiliary LDO input | Connected to GND to disable 1.8 V LDO output; tied to VIN or VMAIN to enable fixed 1.8 V logic supply. |
| LDOOUT (Pin 4) | Auxiliary LDO output | Fixed 1.8 V / 20 mA output for timing controller or display logic; includes short-circuit foldback protection. |
| FBL (Pin 5) | VGL feedback input | Connects to VGL–VMAIN resistor divider; regulates VGL to 0 V reference with ±3% accuracy over temperature. |
| FBM (Pin 6) | VMAIN feedback input | Connects to VMAIN resistor divider; regulates main output to 1.213 V reference with ±0.8% typical accuracy. |
| AGND (Pins 3, 4, 7) | Analog ground | Low-noise reference return for feedback networks; must be connected to PGND under IC for stability. |
| VMAIN (Pin 8) | Main output | Post-regulated, low-ripple output for LCD source drivers; requires external 220 nF ceramic capacitor. |
| FBH (Pin 9) | VGH feedback input | Connects to VGH resistor divider; regulates boosted output to 1.213 V reference with ±3% accuracy. |
| VGH (Pin 10) | Positive gate drive output | Boosted output up to 20 V for LCD gate-on voltage; includes internal 10 kΩ discharge resistor for power-down. |
| BOOT (Pin 11) | Bootstrap supply | Provides gate drive voltage for external rectifier MOSFET; requires 100 nF ceramic capacitor to SWP. |
| PGND (Pin 12) | Power ground | High-current return path for switching nodes; must be connected to AGND under IC via low-inductance trace. |
| SWP (Pin 13) | Low-side switch node | Drain of internal N-MOS1; connects to inductor and diode anode; carries high di/dt switching current. |
| SWN (Pin 14) | High-side switch node | Source of internal P-MOS1; connects to inductor and diode cathode; used for inductor current sensing. |
| VIN (Pin 15) | Main input supply | Primary power input (2.7–5.5 V); requires local 2.2 µF ceramic decoupling capacitor near pin. |
| GATE (Pin 16) | External MOSFET driver | Open-drain output driving gate of external P-MOSFET; pulled down via 100 kΩ internal resistor during RUN high. |
Key Features
| Feature | Design Value |
|---|---|
| Single-inductor quadruple-output architecture | Reduces BOM count and PCB area by eliminating separate inductors for VGH/VGL/VMAIN, enabling <1 mm profile solutions. |
| Automatic power sequencing | Guarantees safe TFT panel startup: VGL powers before VGH, and VMAIN enables only after VGL reaches 90% of target. |
| Post-regulated VMAIN LDO | Delivers <5 mVP-P ripple at 10 mA load-critical for stable source driver bias and reduced image flicker. |
| Integrated fault protection | Includes cycle-by-cycle current limiting (150 mA typ), UVLO (2.15 V falling), and latched shutdown on sustained output faults. |
| 4.0 MHz switching frequency | Enables use of 8.2 µH thin-film inductors and reduces size of input/output filtering components versus 1–2 MHz alternatives. |
| QFN-16 thermal package | Exposed die pad and low RθJA (68°C/W) support continuous 25 mA VMAIN + 2 mA VGH/VGL operation at +85°C ambient. |
Applications
| Smartphone LCD Power Management | Portable GPS Display Supply |
|---|---|
|
Use Scenario: Compact smartphone with 3.5" a-Si TFT-LCD requiring sequenced gate voltages and low-noise source driver supply. IC Role / Device Role / Timing Role: Primary power IC generating VMAIN, VGH, VGL, and 1.8 V logic rail from single Li-ion cell (3.0–4.2 V). Use Value: Eliminates four discrete DC-DC converters; achieves <1 mm board height; meets display vendor's strict VMAIN ripple (<5 mVP-P) spec. |
Use Scenario: Battery-powered automotive GPS unit with sunlight-readable LTPS display needing robust cold-start performance. IC Role / Device Role / Timing Role: Core display power manager delivering −15 V VGL and +18 V VGH with automatic sequencing across −40°C to +85°C. Use Value: UVLO (2.15 V) ensures reliable startup down to weak battery; 83% efficiency extends runtime; QFN package withstands automotive thermal cycling. |
| Digital Still Camera Backlight Panel | Handheld Medical Instrument Display |
|
Use Scenario: DSLR or mirrorless camera with high-resolution rear LCD requiring fast transient response during mode changes. IC Role / Device Role / Timing Role: Quadruple-output supply providing 5.0 V VMAIN, +15 V VGH, −12 V VGL, and 1.8 V logic from 3.7 V Li-ion pack. Use Value: 4.0 MHz switching enables <10 µs load transient recovery; post-regulated VMAIN prevents image artifacts during autofocus activation. |
Use Scenario: Portable ultrasound or patient monitor with monochrome TFT display operating in clinical environments. IC Role / Device Role / Timing Role: Certified display power solution delivering stable, low-noise VMAIN and sequenced gate supplies per IEC 60601-1 EMC requirements. Use Value: Integrated current limiting and latch-off protection prevent field failures; 1.8 V LDO powers display timing controller without external regulator. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TFT-LCD power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65120RGTT | Fixed 3.3 V VMAIN output; same VGH/VGL capability and sequencing logic. | Used where display source driver requires fixed 3.3 V (e.g., legacy a-Si panels), not adjustable VMAIN. | Select TPS65120RGTT if system design mandates fixed 3.3 V VMAIN and does not require VMAIN adjustment via feedback resistors. |
| TPS65123RGTT | No auxiliary LDO; VMAIN only (3.0–5.3 V/25 mA); identical VGH/VGL and sequencing. | Targeted at cost-sensitive designs omitting logic rail generation-requires external 1.8 V/3.3 V regulator. | Choose TPS65123RGTT when display timing controller has separate logic supply, reducing component count and cost. |
Compared with TPS65120RGTT and TPS65123RGTT, the TPS65121RGTT uniquely provides both adjustable VMAIN (3.0–5.3 V) and integrated 1.8 V LDO output-making it optimal for new designs requiring flexibility in source driver voltage and self-contained logic power without external regulators.
Availability
TPS65121RGTT is available at Aetrix Electronics and suitable for smartphone LCD power management, portable GPS display supply, digital still camera backlight panels, and handheld medical instrument displays requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for TPS65121RGTT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs for industrial, automotive, and consumer applications.
The TPS65121RGTT belongs to TI's TFT-LCD power supply product line, engineered specifically to consolidate multiple display rail generators into a single compact IC for space-constrained portable electronics.
FAQ
What is the maximum output current capability of the TPS65121RGTT on its VMAIN rail?
The TPS65121RGTT delivers up to 25 mA on VMAIN when VMAIN ≤ 5.3 V, and 7.5 mA when VMAIN ≥ 5.3 V. This is specified under conditions of VIN = 2.7–5.5 V and TA = −40°C to +85°C. The post-regulated LDO stage ensures <5 mVP-P ripple at full load, making TPS65121RGTT suitable for noise-sensitive LCD source drivers in portable devices.
Does the TPS65121RGTT support programmable power sequencing like the TPS65124RGTT?
No, the TPS65121RGTT implements fixed automatic power sequencing-not programmable sequencing. It powers VGL first, then VGH after VGL reaches 90% of target, and finally enables VMAIN after VGH stabilizes. In contrast, TPS65124RGTT uses dedicated ENVGL/ENVGH pins for user-defined sequencing. TPS65121RGTT is optimized for standard a-Si/LTPS panels requiring this specific order.
What is the purpose of the GATE pin on the TPS65121RGTT, and how is it used?
The GATE pin on the TPS65121RGTT is an open-drain output that drives the gate of an external P-channel MOSFET (e.g., in Figure 18). When RUN is high, GATE is pulled low via an internal 100 kΩ resistor to turn on the MOSFET and initiate converter startup. During shutdown, GATE is pulled to VIN to ensure clean turn-off. Leaving GATE floating is prohibited-it must be terminated.
Can the TPS65121RGTT generate a 3.3 V VMAIN output, and what is its regulation accuracy?
Yes, the TPS65121RGTT supports VMAIN from 3.0 V to 5.3 V via external resistor divider on FBM. At 3.3 V output, regulation accuracy is ±0.8% typical (±1.5% max over temperature and line/load), based on the 1.213 V internal reference and feedback network tolerance. This meets stringent requirements for LCD source driver bias stability.
How does the TPS65121RGTT handle short-circuit conditions on VGH or VGL outputs?
The TPS65121RGTT monitors VGH and VGL continuously. If either output drops below its fault threshold for >100 µs (typical fault timer), the device simultaneously disables all outputs (VMAIN, VGH, VGL, LDOOUT) and enters a latched shutdown state. Recovery requires toggling EN/RUN below 0.4 V or cycling VIN below the 2.15 V UVLO threshold-ensuring robust protection in field deployments.
TPS65121RGTT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Converter, TFT LCD
- Voltage - Input:
- 2.5V ~ 5.5V
- Number of Outputs:
- 4
- Voltage - Output:
- 3V ~ 5.6V, Adj up to 20V, Adj down to -18V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-VQFN (3x3)
TPS65121RGTT FAQ
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5.How can I obtain technical support or documentation for TPS65121RGTT?
For technical support, including TPS65121RGTT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65121RGTT requirements.
6.How does Aetrix verify that TPS65121RGTT is sourced from the original manufacturer or authorized distributors?
All TPS65121RGTT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65121RGTT meets industry standards.
7.What is the process for return or replacement of TPS65121RGTT?
All TPS65121RGTT units undergo pre-shipment inspection (PSI). If there is an issue with TPS65121RGTT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65121RGTT part is unused and in its original packaging.
Return procedure for TPS65121RGTT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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