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Texas Instruments TPS65124RGTR

Part No.:
TPS65124RGTR
Manufacturer:
Texas Instruments
Category:
Special Purpose Regulators
Package:
16-VFQFN Exposed Pad
Datasheet:
AetrixTPS65124RGTR.pdf
Description:
IC REG CONV TFT LCD 4OUT 16QFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,483

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Product details

Overview

TPS65124RGTR from Texas Instruments is a single-inductor quadruple-output DC-DC converter for a-Si and LTPS TFT-LCD displays, delivering independently regulated VMAIN (3.0–5.3 V/25 mA), VGH (up to 20 V/2 mA), VGL (down to −18 V/2 mA), and programmable power sequencing via ENVGH/ENVGL pins. It operates from 2.7–5.5 V input and achieves up to 83% core efficiency at 4 MHz switching frequency.

For engineers reviewing the TPS65124RGTR datasheet, TPS65124RGTR pinout, TPS65124RGTR application, or TPS65124RGTR equivalent, this page provides verified specifications, validated pin functions, confirmed TFT-LCD power sequencing behavior, and real-world design constraints including bootstrapped gate drive, post-regulated low-ripple VMAIN, and independent enable control for VGH/VGL outputs.

Technical Context

The TPS65124RGTR uses a free-running variable-peak-current PWM architecture to time-multiplex a single inductor across BOOT, VGH, and VGL outputs, enabling pseudo-fixed-frequency operation at 4 MHz with fast transient response. Its control logic implements programmable power-up/down sequencing through dedicated ENVGH and ENVGL pins - unlike TPS65120/1/2/3 - allowing independent enable/disable of positive and negative gate drivers.

VMAIN is post-regulated by an integrated LDO stage to achieve ≤5 mVP-P ripple, while BOOT voltage is dynamically regulated to ~VMAIN + 0.5 V to minimize LDO dropout loss. Fault protection includes cycle-by-cycle current limiting (150 mA typical), UVLO (2.15 V falling threshold), and latched shutdown on sustained output faults (>100 µs).

Key Specifications

ParameterValue and Actual Design Meaning
Input Voltage Range2.7 V to 5.5 V - supports single-cell Li-ion, Li-polymer, and regulated 3.3 V/5 V rails without external pre-regulation.
VMAIN Output3.0 V to 5.3 V / 25 mA - post-regulated by internal LDO for ≤5 mVP-P ripple; feedback reference = 1.213 V.
VGH OutputUp to 20 V / 2 mA - adjustable via external resistor divider; feedback reference = 1.213 V; discharge resistor = 10 kΩ.
VGL OutputDown to −18 V / 2 mA - adjustable via external resistor divider; feedback reference = 0 V; discharge resistor = 10 kΩ.
Switching Frequency4.0 MHz - enables use of ultra-thin 8.2 µH or 10 µH inductors; reduces EMI and saves board space.
Power SequencingProgrammable via ENVGH/ENVGL pins - allows independent control of VGH and VGL enable timing, critical for TFT panel reliability.
Quiescent Current170 µA typical - measured into VIN at full load; supports battery-powered portable devices with extended standby life.

Pinout & Package

TPS65124RGTR is housed in a thermally enhanced 3 × 3 × 0.9 mm QFN-16 package with exposed thermal pad (pin 14). Pin numbering follows standard top-view orientation with pin 1 at top-left corner.

Pin/TerminalCircuit RoleDesign Meaning
EN (1)Enable inputActive-high logic control for main output (VMAIN); must be terminated - floating causes undefined behavior.
RUN (2)Gate driver controlDrives external P-MOSFET; pulled low internally via 100 kΩ to initiate startup; logic-high enables converter.
ENVGL (3)VGL enable inputDedicated active-high control for negative gate supply; required for programmable sequencing in TPS65124 only.
ENVGH (4)VGH enable inputDedicated active-high control for positive gate supply; enables independent timing vs. VGL and VMAIN.
FBL (5)VGL feedback inputConnects to VGL–VMAIN resistor divider; regulates to 0 V nominal - sets negative output voltage precisely.
FBM (6)VMAIN feedback inputConnects to VMAIN resistor divider; regulates to 1.213 V nominal - ensures ±0.8% accuracy over temperature.
AGND (3,4,7)Analog groundMultiple AGND pins (3,4,7) require low-impedance connection to PGND under IC for noise-sensitive feedback stability.
VMAIN (8)Main outputPost-regulated LDO output; supplies source driver; requires 220 nF ceramic output capacitor for ripple suppression.
FBH (9)VGH feedback inputConnects to VGH resistor divider; regulates to 1.213 V nominal - enables precise high-voltage positive output setting.
VGH (10)Positive gate outputBoosted output up to 20 V; includes internal 1-kΩ precharge resistor and 10-kΩ discharge path for safe power-down.
BOOT (11)Bootstrap supplyProvides gate drive voltage for internal N-MOS2 rectifier; must be decoupled with 100 nF ceramic capacitor.
PGND (12)Power groundHigh-current return path for SWP/SWN switches; must connect directly to AGND under IC for thermal and EMI performance.
GATE (16)External MOSFET driverOpen-drain output driving external P-MOSFET gate; pulled up to VIN via internal 100 kΩ during shutdown.
VIN (15)Main inputPrimary power input; accepts 2.7–5.5 V; requires local 2.2 µF ceramic decoupling adjacent to pin.
SWN (14)High-side switch nodeConnects to inductor source terminal; carries peak inductor current; routing must minimize loop area for EMI control.
SWP (13)Low-side switch nodeConnects to inductor drain terminal; tied to PGND during on-time; sensitive to layout-induced ringing.

Key Features

FeatureDesign Value
Single-inductor quadruple outputEliminates need for three separate inductors - reduces BOM count, PCB area, and cost in space-constrained LCD modules.
Programmable VGH/VGL sequencingENVGH and ENVGL pins allow independent enable/disable timing - prevents TFT panel damage during power transitions.
VMAIN post-regulationIntegrated LDO delivers ≤5 mVP-P ripple at 25 mA - meets stringent source-driver noise requirements without external filtering.
4 MHz switching frequencyEnables use of 8.2 µH thin-profile inductors - supports <1 mm component height for ultra-slim handheld designs.
Independent VGH/VGL discharge paths10 kΩ internal resistors actively discharge both gate outputs during shutdown - ensures reliable panel reset without external components.

Applications

Smartphone LCD Power ManagementPortable GPS Display Supply

Use Scenario: Powering a 4.3-inch a-Si TFT-LCD panel in a battery-operated smartphone with tight height constraints and dynamic brightness control.

IC Role / Device Role / Timing Role: Generates VMAIN (4.5 V), VGH (+18 V), VGL (−15 V), and sequences VGL before VGH during power-up to prevent latch-up.

Use Value: Single-chip solution eliminates three discrete DC-DC converters and reduces total solution height to <1 mm - critical for slim bezel designs.

Use Scenario: Supplying gate and source drivers for a sunlight-readable 3.5-inch LTPS TFT display in a ruggedized portable GPS unit.

IC Role / Device Role / Timing Role: Delivers stable VMAIN (5.0 V/20 mA), VGH (+16 V), VGL (−12 V) with programmable enable timing to match display controller startup sequence.

Use Value: 4 MHz operation minimizes inductor size and EMI emissions - improves EMC compliance in RF-sensitive navigation devices.

Handheld Medical Imaging DisplayAutomotive Infotainment Cluster

Use Scenario: Driving a high-contrast monochrome TFT panel in a portable ultrasound device requiring low-noise, low-ripple power for analog front-end stability.

IC Role / Device Role / Timing Role: Provides post-regulated VMAIN with ≤5 mVP-P ripple and independent VGH/VGL control to avoid image artifacts during rapid screen updates.

Use Value: Integrated LDO and precision feedback (±0.8% VMAIN accuracy) eliminate need for external low-noise regulators - simplifies qualification.

Use Scenario: Powering a 7-inch automotive-grade TFT-LCD cluster with extended temperature range (−40°C to +85°C) and AEC-Q200 alignment.

IC Role / Device Role / Timing Role: Supplies VMAIN (5.3 V), VGH (+20 V), VGL (−18 V) with robust UVLO (2.15 V falling) and thermal shutdown (135°C TJ max).

Use Value: Qualified for industrial temperature range and includes cycle-by-cycle current limiting - meets functional safety requirements for non-critical display subsystems.

Equivalent & Alternatives

The following parts are listed as comparable options for similar TFT-LCD power supply applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
TPS65123RGTRNo ENVGH/ENVGL pins; automatic sequencing only; fixed 3.0–5.3 V VMAIN range; no auxiliary LDO.Lacks independent gate-supply enable control; unsuitable where custom sequencing is required.Select when panel timing is fixed and cost reduction is prioritized over sequencing flexibility.
MAX17105ETL+Higher VGH/VGL current (10 mA each); integrated 3.3 V/200 mA LDO; I²C interface for dynamic voltage adjustment.Supports real-time VGH/VGL tuning and higher gate-drive current - suited for high-resolution LTPS panels.Select when adaptive gate voltage control or higher drive capability is needed beyond TPS65124RGTR's 2 mA limit.

Compared with TPS65123RGTR and MAX17105ETL+, the TPS65124RGTR uniquely balances programmable sequencing, compact 3×3 mm footprint, and proven reliability in consumer portable designs - making it optimal for cost-sensitive, space-constrained a-Si/LTPS displays requiring deterministic power-up order.

Availability

TPS65124RGTR is available at Aetrix Electronics and suitable for smartphone LCD power management, portable GPS display supply, handheld medical imaging display, and automotive infotainment cluster applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for TPS65124RGTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power conversion ICs.

The TPS6512x product line was designed specifically for space-constrained, battery-powered TFT-LCD displays - integrating quadruple output generation, programmable sequencing, and ultra-thin inductor compatibility into a single 3×3 mm QFN package.

FAQ

What is the maximum VGL output voltage supported by the TPS65124RGTR?

The TPS65124RGTR supports VGL output down to −18 V, as specified in its absolute maximum ratings and electrical characteristics table. This negative voltage range is fully operational across the −40°C to +85°C temperature range and is regulated via the FBL pin with a 0 V feedback reference. The device maintains ±3% typical accuracy on VGL under load conditions up to 2 mA.

Does the TPS65124RGTR require external components for basic operation?

Yes, the TPS65124RGTR requires external components for full functionality: a 10 µH inductor between SWP and SWN, input (2.2 µF) and output (220 nF for VMAIN/VGH/VGL) ceramic capacitors, and resistor dividers on FBH, FBM, and FBL pins to set output voltages. The BOOT pin also requires a 100 nF capacitor. No external compensation is needed due to its internally compensated control loop.

How does power sequencing work on the TPS65124RGTR compared to earlier TPS6512x variants?

Unlike TPS65120/1/2/3 which use automatic sequencing triggered by EN/RUN, the TPS65124RGTR features dedicated ENVGH and ENVGL pins for fully programmable sequencing. This allows independent assertion/deassertion of VGH and VGL enables - critical for panels requiring precise gate-driver timing. VMAIN remains enabled via EN, but VGH/VGL activation is decoupled and controllable by system logic.

Can the TPS65124RGTR operate with a 2.5 V input supply?

No - the TPS65124RGTR has a minimum input voltage of 2.7 V for full-load operation, per its recommended operating conditions. While the datasheet notes a 2.5 V start-up threshold under specific light-load conditions, stable regulation of all outputs (especially VGH up to 20 V and VGL down to −18 V) requires VIN ≥ 2.7 V. Operation below 2.7 V risks undervoltage lockout or output collapse.

What is the purpose of the GATE pin on the TPS65124RGTR?

The GATE pin on the TPS65124RGTR drives the gate of an external P-channel MOSFET used in the power-down sequencing circuit. During normal operation, GATE is pulled low (via internal 100 kΩ) to turn on the MOSFET and enable the DC-DC converter. During shutdown, GATE is pulled to VIN to disable the MOSFET and isolate the input rail - a key part of the controlled power-down sequence.

TPS65124RGTR Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
16-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Applications:
Converter, TFT LCD
Voltage - Input:
2.5V ~ 5.5V
Number of Outputs:
4
Voltage - Output:
3V ~ 5.6V, Adj up to 20V, Adj down to -18V
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-VQFN (3x3)

TPS65124RGTR FAQ

1.How can I place an order for TPS65124RGTR through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS65124RGTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS65124RGTR reliable?

The price and inventory of TPS65124RGTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65124RGTR is usually 5 days.

3.What payment methods are accepted for TPS65124RGTR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65124RGTR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS65124RGTR?

TPS65124RGTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS65124RGTR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS65124RGTR?

For technical support, including TPS65124RGTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65124RGTR requirements.

6.How does Aetrix verify that TPS65124RGTR is sourced from the original manufacturer or authorized distributors?

All TPS65124RGTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65124RGTR meets industry standards.

7.What is the process for return or replacement of TPS65124RGTR?

All TPS65124RGTR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65124RGTR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS65124RGTR part is unused and in its original packaging.

Return procedure for TPS65124RGTR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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