Texas Instruments TPS65131RGERG4
- Part No.:
- TPS65131RGERG4
- Manufacturer:
- Texas Instruments
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65131RGERG4.pdf
- Description:
- IC REG BUCK BOOST ADJ DL 24VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,678
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Product details
Overview
TPS65131RGERG4 from Texas Instruments is a dual-output DC-DC converter generating independent positive (up to +15 V) and negative (down to –15 V) rails from a 2.7–5.5 V input, with 2 A switch current limit on both outputs, 1.25–1.5 MHz fixed-frequency PWM control, and integrated overvoltage/thermal/UVLO protection - used in AMOLED display power supplies for industrial HMI and medical devices.
For engineers reviewing the TPS65131RGERG4 datasheet, TPS65131RGERG4 pinout, TPS65131RGERG4 application, or TPS65131RGERG4 equivalent, key selection criteria include independent enable sequencing, ±1.213 V reference accuracy, 1.5 µA shutdown current, and VQFN-24 package thermal performance (RθJA = 34.1°C/W).
Technical Context
The TPS65131RGERG4 implements two independent fixed-frequency PWM regulators: a boost stage for VPOS and an inverting buck-boost stage for VNEG, sharing only a common oscillator and 1.213 V internal reference. Each stage uses feedforward control with error amplifiers referenced to FBP/FBN pins and supports soft-start ramping of switch current limit over ~1 ms.
Power-save mode is individually enabled via PSP/PSN pins, allowing discontinuous conduction at light loads for the inverter while maintaining continuous conduction in the boost stage. Protection includes per-rail overvoltage detection (±5% threshold), UVLO (2.1–2.7 V), and thermal shutdown (150°C with 5°C hysteresis).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V), 3-cell alkaline/NiMH, or regulated 3.3/5 V rails. |
| VPOS output range | +0.5 V above VIN to +15 V - adjustable via external resistor divider on FBP pin with 1.213 V reference. |
| VNEG output range | –15 V to –2 V - adjustable via external resistor divider on FBN pin with 0 V reference point. |
| Switch current limit | 1.95 A typical (TPS65131) - enables up to ~800 mA at VPOS = 15 V / VIN = 3.6 V per Figure 6-2. |
| Switching frequency | 1.25–1.5 MHz - allows use of compact 4.7 µH inductors and reduces EMI filtering burden. |
| Shutdown current | 0.2–1.5 µA - ensures battery longevity during system sleep in portable displays. |
| Reference voltage | 1.213 V ±1.3% - sets output accuracy; feedback bias current ≤50 nA minimizes divider error. |
Pinout & Package
TPS65131RGERG4 is housed in a thermally enhanced 4-mm × 4-mm VQFN-24 package (RGE) with exposed thermal pad for PCB heat sinking. Pin count is 24, lead pitch is 0.5 mm, and package conforms to JEDEC MO-220 standards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ENP (Pin 8) | Enable input for VPOS | Logic HIGH (≥1.4 V) activates boost converter; enables independent power-up sequencing. |
| ENN (Pin 10) | Enable input for VNEG | Logic HIGH (≥1.4 V) activates inverting converter; allows asymmetric rail activation timing. |
| FBP (Pin 22) | Positive output feedback | Connects to resistor divider top node; regulates VPOS to 1.213 V reference with ≤50 nA bias. |
| FBN (Pin 16) | Negative output feedback | Connects to resistor divider low node; regulates VNEG to 0 V reference with ≤50 nA bias. |
| BSW (Pin 7) | External P-FET gate driver | Sinks current to turn ON external PMOS between battery and boost inductor for full load disconnect. |
| PGND (Pins 2,3) | Power ground return | Dedicated low-impedance path for high-current switch node return; must be separated from AGND. |
| AGND (Pin 19) | Analog ground reference | Reference for feedback, reference, and control circuits; requires star-point connection to PGND. |
| VREF (Pin 17) | Internal reference output | 1.213 V precision reference; bypassed with 220 nF capacitor to AGND for stability. |
Key Features
| Feature | Design Value |
|---|---|
| Independent output enable | ENP and ENN pins allow staggered power-up/down of VPOS and VNEG rails - critical for LCD bias sequencing. |
| Integrated load disconnect | BSW pin drives external P-channel FET to eliminate DC leakage path when VPOS is disabled - extends battery life. |
| Per-rail overvoltage protection | Shuts down VPOS or VNEG independently if feedback exceeds regulation by >5% - prevents damage to sensitive display drivers. |
| Thermal shutdown with hysteresis | Halts both converters at 150°C junction temperature and resumes at 145°C - avoids thermal oscillation in enclosed HMIs. |
| Fixed-frequency PWM + power-save mode | Operates in CCM at full load (1.25–1.5 MHz); switches to pulse-skipping at light loads via PSP/PSN control - maintains >80% efficiency down to 1 mA. |
Applications
| AMOLED Display Bias Supply | Industrial HMI Power Rail |
|---|---|
Use Scenario: Powering gate-source and source-drain bias rails in 7–12 inch AMOLED panels used in factory-floor operator terminals. IC Role / Device Role / Timing Role: Generates isolated +12 V and –8 V rails from 3.7 V Li-ion battery; sequenced via ENP/ENN to prevent panel latch-up during startup. Use Value: 2 A switch current limit supports peak panel current surges; 1.5 MHz switching minimizes inductor size in space-constrained enclosures. | Use Scenario: Providing split-rail supply for differential op-amps and ADC drivers in building automation thermostats with local display. IC Role / Device Role / Timing Role: Delivers +5 V and –5 V from 5 V USB input; BSW-controlled load disconnect prevents battery drain when thermostat enters deep sleep. Use Value: 1.213 V reference accuracy ensures <±1% output regulation across –40°C to +85°C ambient - meets industrial calibration requirements. |
| Medical Patient Monitor Display | Test & Measurement Signal Conditioning |
Use Scenario: Generating bias voltages for high-resolution OLED modules in portable ECG monitors requiring low-noise, stable power. IC Role / Device Role / Timing Role: Supplies +10 V and –10 V rails with independent soft-start (1 ms ramp) to avoid transient coupling into analog front-end circuitry. Use Value: 1.5 µA shutdown current enables >5-year shelf life on primary lithium battery; UVLO (2.35 V typ.) prevents erratic operation near end-of-life. | Use Scenario: Powering differential audio amplifier stages and DAC reference buffers in handheld spectrum analyzers. IC Role / Device Role / Timing Role: Provides low-ripple ±12 V rails from 3.3 V system rail; CN/CP compensation pins enable optimization for low-noise 20 kHz–20 MHz bandwidth. Use Value: 81–89% conversion efficiency at 100–500 mA loads reduces thermal load in sealed test equipment enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-rail DC-DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65132RGET | Same RGE package, identical pinout, but rated for 0.8 A switch current limit (TPS65130 variant) - lower VPOS/VNEG max output current. | Targeted at smaller displays (<5") or lower-power signal chains where 800 mA peak suffices. | Select when cost sensitivity outweighs current headroom; verify thermal margin using RθJA = 34.1°C/W. |
| MAX17504ATP+T | 36 V input, dual synchronous buck architecture - no native negative output; requires external inverting stage for VNEG. | Used in higher-voltage industrial systems (12–24 V bus) where split-rail generation is secondary to main rail efficiency. | Choose only when redesigning for higher input voltage and accepting added BOM complexity for negative rail. |
Compared with TPS65131RGERG4, TPS65132RGET offers pin-compatible replacement with reduced current capability and lower cost, while MAX17504ATP+T provides higher input voltage tolerance but requires external components to replicate dual-rail functionality - making TPS65131RGERG4 optimal for compact, battery-powered dual-rail designs.
Availability
TPS65131RGERG4 is available at Aetrix Electronics and suitable for AMOLED display bias, industrial HMI power management, and medical patient monitor applications requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS65131RGERG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.
The TPS6513x product line was designed specifically for compact, high-efficiency dual-rail power in portable displays and industrial interfaces - emphasizing low quiescent current, independent sequencing, and robust fault protection.
FAQ
What is the maximum output current capability of the TPS65131RGERG4 at VPOS = 15 V and VIN = 3.6 V?
The TPS65131RGERG4 delivers up to ~800 mA at VPOS = 15 V and VIN = 3.6 V, as confirmed by Figure 6-2 in the datasheet. This is enabled by its 1.95 A typical switch current limit and optimized for high step-up ratios. The actual achievable current depends on PCB layout, inductor DCR, and thermal management - with RθJA = 34.1°C/W requiring adequate copper area under the thermal pad for sustained operation.
How does the TPS65131RGERG4 achieve load disconnect for the positive output rail?
The TPS65131RGERG4 does not integrate a high-side switch for VPOS disconnect. Instead, its BSW (Pin 7) pin drives the gate of an external P-channel MOSFET placed between the battery and boost inductor. When ENP is low, BSW goes low, turning OFF the external FET and breaking the DC path - ensuring zero battery drain. This architecture is explicitly detailed in Section 7.3.4 of the TPS65131RGERG4 datasheet.
Can the TPS65131RGERG4 generate symmetric ±12 V outputs from a 3.7 V Li-ion battery?
Yes, the TPS65131RGERG4 can generate ±12 V outputs from a 3.7 V input. VPOS is set via resistor divider on FBP (e.g., R1 = 975 kΩ, R2 = 85.8 kΩ), and VNEG via divider on FBN referenced to VREF (e.g., R3 = 1.3 MΩ, R4 = 104.8 kΩ). Both rails operate independently, supporting non-symmetric configurations - confirmed in Section 8.2.2.1 and Figure 8-1 of the TPS65131RGERG4 datasheet.
What is the purpose of the CN and CP pins on the TPS65131RGERG4?
CN (Pin 18) and CP (Pin 21) are compensation pins for the inverting and boost converter control loops, respectively. They connect to RC networks that stabilize the feedback loop phase margin - essential for preventing oscillation under varying load and input conditions. Proper compensation is required for stable regulation, especially when using low-ESR ceramic output capacitors, as specified in Section 8.2.2.2 of the TPS65131RGERG4 datasheet.
Does the TPS65131RGERG4 support power-save mode on both outputs simultaneously?
Yes, the TPS65131RGERG4 supports independent power-save mode activation via PSP (Pin 9) for the boost stage and PSN (Pin 11) for the inverting stage. When either pin is pulled HIGH, its respective converter enters pulse-skipping mode at light loads - improving light-load efficiency while maintaining regulation. This behavior is documented in Section 7.4.1 and Table 6-6 of the TPS65131RGERG4 datasheet.
TPS65131RGERG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Buck-Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.2V, -2V
- Voltage - Output (Max):
- 15V, -15V
- Current - Output:
- 1.8A (Switch)
- Frequency - Switching:
- 1.38MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65131RGERG4 FAQ
1.How can I place an order for TPS65131RGERG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65131RGERG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65131RGERG4 reliable?
The price and inventory of TPS65131RGERG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65131RGERG4 is usually 5 days.
3.What payment methods are accepted for TPS65131RGERG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65131RGERG4 transactions.
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4.How is shipping managed for TPS65131RGERG4?
TPS65131RGERG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65131RGERG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65131RGERG4?
For technical support, including TPS65131RGERG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65131RGERG4 requirements.
6.How does Aetrix verify that TPS65131RGERG4 is sourced from the original manufacturer or authorized distributors?
All TPS65131RGERG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65131RGERG4 meets industry standards.
7.What is the process for return or replacement of TPS65131RGERG4?
All TPS65131RGERG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS65131RGERG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65131RGERG4 part is unused and in its original packaging.
Return procedure for TPS65131RGERG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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