My Inquiry
My Account
Texas Instruments TPS65131TRGERQ1
- Part No.:
- TPS65131TRGERQ1
- Manufacturer:
- Texas Instruments
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65131TRGERQ1.pdf
- Description:
- IC REG BUCK BOOST ADJ DL 24VQFN
- Quantity:
- Payment:
- Shipping:
Inventory:8,175
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS65131TRGERQ1 from Texas Instruments is an automotive-grade dual-output DC-DC converter generating independently adjustable positive (up to +15 V) and negative (down to –15 V) rails from a 2.7–5.5 V input, delivering up to 200 mA per rail with 91% peak efficiency on the positive output and 85% on the negative output-designed for OLED display bias in automotive instrument clusters and head-up displays.
For engineers reviewing the TPS65131TRGERQ1 datasheet, TPS65131TRGERQ1 pinout, TPS65131TRGERQ1 application, or TPS65131TRGERQ1 equivalent, key selection criteria include independent enable sequencing (ENP/ENN), power-save mode per rail (PSP/PSN), thermal shutdown (150°C), overvoltage protection on both outputs, and QFN-24 package with wettable flanks for automated optical inspection.
Technical Context
The TPS65131TRGERQ1 integrates two fixed-frequency PWM controllers-one boost and one inverting-sharing a common 1.213 V reference and oscillator (1.15–1.5 MHz), each operating in continuous-conduction mode (CCM) at full load and transitioning to discontinuous-conduction mode (DCM) under light load when power-save mode is enabled. Control uses feedforward compensation with internal error amplifiers referenced to FBP and FBN pins.
It features independent soft-start (1 ms current-limit ramp), undervoltage lockout (2.35 V threshold), and dual-stage protection: overvoltage shutdown (±5% regulation deviation), thermal shutdown (150°C with 5°C hysteresis), and internal switch current limits (1.95 A typical for both boost and inverter stages).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports direct connection to automotive 3.3 V or 5 V supply rails without pre-regulation. |
| Positive Output Range | +0.5 V above VIN to +15 V - adjustable via external resistor divider on FBP pin; regulated to ±3% total dc accuracy. |
| Negative Output Range | –15 V to –2 V - adjustable via external divider referenced to VREF (1.213 V); FBN regulation voltage = 0 V ±24 mV. |
| Switch Current Limit | 1.95 A typical (boost & inverter) - sets maximum deliverable output current based on input/output voltage ratio and inductor selection. |
| Quiescent Current | 500 µA typical - enables low-power operation in always-on automotive subsystems; drops to 0.2 µA in shutdown. |
| Operating Junction Temp | –40°C to +125°C - qualified per AEC-Q100 Grade 2; validated for under-hood and dashboard environments. |
| Thermal Resistance | RθJA = 34.1°C/W - requires PCB thermal pad connected to PGND for reliable operation at full load in sealed enclosures. |
Pinout & Package
TPS65131TRGERQ1 is housed in a 4 mm × 4 mm VQFN-24 package (RGE) with exposed thermal pad (to be soldered to PGND plane) and wettable flanks for solder-joint inspection. The package has no internal connections on pins 12 and 20 (NC).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ENP (Pin 8) | Enable input for positive output | Logic HIGH (≥1.4 V) activates boost converter; enables independent power-up sequencing with soft-start. |
| ENN (Pin 10) | Enable input for negative output | Logic HIGH activates inverting converter; allows staggered turn-on/off to avoid supply rail coupling. |
| FBP (Pin 22) | Feedback input for positive output | Connects to resistor divider; regulates VPOS by comparing to internal 1.213 V reference (±24 mV tolerance). |
| FBN (Pin 16) | Feedback input for negative output | Connects to divider referenced to VREF; regulates VNEG with 0 V nominal setpoint (±24 mV tolerance). |
| BSW (Pin 7) | External PFET gate control | Drives external PMOS to disconnect boost output from input during shutdown-prevents battery drain. |
| VREF (Pin 17) | Internal reference output | 1.213 V ±13 mV reference; must be bypassed with 220 nF capacitor to AGND for stable feedback operation. |
| PGND (Pins 2,3) | Power ground | High-current return path for both converters; must be low-inductance connection to thermal pad and system GND. |
| AGND (Pin 19) | Analog ground | Reference for feedback and control circuits; should be star-connected to PGND at single point near device. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 2 qualification | Validated for –40°C to +105°C ambient operation with electrical testing up to +125°C junction temperature. |
| Dual independent enable inputs | ENP and ENN allow precise sequencing of VPOS/VNEG power-up/down-critical for OLED display startup timing. |
| Per-rail power-save mode | PSP and PSN pins enable DCM operation individually, improving light-load efficiency without sacrificing regulation. |
| Integrated overvoltage protection | Shuts down respective converter if FBP or FBN deviates >5% from target-protects downstream display drivers. |
| Thermal shutdown with hysteresis | Triggers at 150°C junction temp; re-enables only after cooling by ≥5°C-prevents thermal oscillation in confined spaces. |
Applications
| OLED Display Bias Supply | TFT-LCD Gate Driver Supply |
|---|---|
|
Use Scenario: Powering segmented OLED panels in automotive digital instrument clusters requiring stable ±12 V bias rails. IC Role / Device Role / Timing Role: Dual-output DC-DC converter providing isolated, sequenced positive and negative bias voltages with <1 ms soft-start. Use Value: Eliminates need for discrete boost + inverter ICs; reduces BOM count by 40% and PCB area by 35% versus discrete solutions. |
Use Scenario: Generating gate-on/gate-off voltages (e.g., +20 V / –10 V) for automotive TFT-LCD modules in center-stack infotainment displays. IC Role / Device Role / Timing Role: Adjustable dual-rail converter enabling dynamic voltage scaling across temperature and brightness conditions. Use Value: Achieves ±1.5% output regulation over –40°C to +105°C ambient-ensures consistent LCD contrast and response time. |
| CCD Image Sensor Bias | Automotive HUD High-Voltage Supply |
|
Use Scenario: Supplying precision bias voltages (+15 V, –10 V) to automotive CCD-based rear-view cameras operating in extreme cold starts. IC Role / Device Role / Timing Role: Low-quiescent-current dual converter with 0.2 µA shutdown current-preserves battery during vehicle sleep mode. Use Value: Maintains regulation stability down to –40°C with no external heater required-reduces system power budget by 2.1 W. |
Use Scenario: Providing high-voltage rails for laser-driven head-up displays requiring fast transient response to projection brightness changes. IC Role / Device Role / Timing Role: Fixed-frequency PWM controller with 1.25 MHz switching-enables compact LC filter design and low EMI emissions. Use Value: Delivers <50 µs load-step recovery time (200 mA step) - prevents HUD image flicker during rapid luminance transitions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC-DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65132TRGERQ1 | Same pinout, higher efficiency (93% pos / 87% neg), lower quiescent current (350 µA), but no BSW pin for external PFET control. | Lacks load-disconnect capability-unsuitable where battery isolation during shutdown is mandatory. | Select when efficiency and IQ are prioritized over active load disconnect in non-critical power domains. |
| MAX17504ATP+T | Industrial-grade (not AEC-Q100), wider input range (4.5–40 V), single-output only-requires two ICs for ± rails. | Not qualified for automotive use; lacks integrated sequencing, OVP, and thermal shutdown per rail. | Consider only for non-automotive industrial displays where extended input voltage range outweighs qualification needs. |
Compared with TPS65131TRGERQ1, TPS65132TRGERQ1 offers improved efficiency and lower IQ but removes critical BSW functionality for battery-safe shutdown, while MAX17504ATP+T requires dual placement and lacks automotive qualification-making TPS65131TRGERQ1 the sole solution integrating AEC-Q100 compliance, per-rail control, and load disconnect in a single QFN-24 package.
Availability
TPS65131TRGERQ1 is available at Aetrix Electronics and suitable for automotive instrument clusters, head-up displays, and CCD camera modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TPS65131TRGERQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of experience in power management innovation and automotive qualification.
The TPS65131-Q1 product line delivers highly integrated, AEC-Q100-qualified dual-output converters targeting display bias applications in automotive cockpits, where reliability, small footprint, and precise rail sequencing are essential.
FAQ
What is the maximum output current capability of the TPS65131TRGERQ1 on its positive and negative rails?
The TPS65131TRGERQ1 delivers up to 200 mA on both the positive (VPOS) and negative (VNEG) outputs under typical conditions, depending on input-to-output voltage ratios and thermal management. At VIN = 3.6 V, VPOS = 10.5 V, and VNEG = –10 V, the device sustains these currents with ≤85% total efficiency. Peak switch current is limited to 1.95 A, constraining maximum output current at extreme voltage differentials-e.g., 150 mA at VPOS = 15 V with VIN = 2.7 V.
Does the TPS65131TRGERQ1 support independent power sequencing between its positive and negative outputs?
Yes, the TPS65131TRGERQ1 supports fully independent sequencing via dedicated enable pins: ENP (Pin 8) controls the boost converter (VPOS), and ENN (Pin 10) controls the inverting converter (VNEG). Each pin accepts 0 V (disable) or VIN-level (enable), allowing programmable staggered startup and shutdown-critical for preventing latch-up in OLED pixel driver ICs that require strict VPOS-before-VNEG timing.
How does the BSW pin on the TPS65131TRGERQ1 function, and is it required for all applications?
The BSW pin (Pin 7) is an open-drain output that drives the gate of an external PMOS transistor placed between the boost inductor and input supply. It goes LOW when ENP is HIGH, turning on the PMOS to connect the boost output; it goes HIGH-Z when ENP is LOW, allowing the PMOS to turn off and isolate the battery. It is required in applications where complete load disconnect during shutdown is mandated-for example, automotive modules subject to ISO 16750-2 sleep-mode current limits.
What is the purpose of the VREF pin on the TPS65131TRGERQ1, and how must it be used?
The VREF pin (Pin 17) provides a stable 1.213 V ±13 mV internal reference used by both feedback loops. It serves as the bias point for the negative-output divider (FBN), requiring the lower resistor of that divider to connect directly to VREF-not AGND. The pin must be bypassed with a 220 nF ceramic capacitor to AGND to suppress noise and ensure regulation stability; omitting this capacitor causes output drift and potential oscillation.
Can the TPS65131TRGERQ1 operate in power-save mode on only one output rail while keeping the other in PWM mode?
Yes, the TPS65131TRGERQ1 supports asymmetric power-save operation: PSP (Pin 9) enables power-save mode for the boost converter only, and PSN (Pin 11) enables it for the inverting converter only. Driving PSP HIGH and PSN LOW configures VPOS to enter DCM at light loads while VNEG remains in fixed-frequency PWM-useful when one rail powers noise-sensitive analog circuitry requiring constant switching frequency.
TPS65131TRGERQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up, Step-Up/Step-Down
- Output Configuration:
- Positive and Negative (Dual Rail)
- Topology:
- Boost, Buck-Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.2V, -2V
- Voltage - Output (Max):
- 15V, -15V
- Current - Output:
- 1.7A (Switch)
- Frequency - Switching:
- 1.38MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65131TRGERQ1 FAQ
1.How can I place an order for TPS65131TRGERQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65131TRGERQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65131TRGERQ1 reliable?
The price and inventory of TPS65131TRGERQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65131TRGERQ1 is usually 5 days.
3.What payment methods are accepted for TPS65131TRGERQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65131TRGERQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65131TRGERQ1?
TPS65131TRGERQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65131TRGERQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65131TRGERQ1?
For technical support, including TPS65131TRGERQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65131TRGERQ1 requirements.
6.How does Aetrix verify that TPS65131TRGERQ1 is sourced from the original manufacturer or authorized distributors?
All TPS65131TRGERQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65131TRGERQ1 meets industry standards.
7.What is the process for return or replacement of TPS65131TRGERQ1?
All TPS65131TRGERQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS65131TRGERQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65131TRGERQ1 part is unused and in its original packaging.
Return procedure for TPS65131TRGERQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS65131TRGERQ1 Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
