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Texas Instruments TPS65132B0YFFR
- Part No.:
- TPS65132B0YFFR
- Manufacturer:
- Texas Instruments
- Category:
- Special Purpose Regulators
- Package:
- 15-UFBGA, DSBGA
- Datasheet:
-
TPS65132B0YFFR.pdf
- Description:
- IC REG TFT/LCD CONV 2OUT 15DSBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,551
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Product details
Overview
TPS65132B0YFFR from Texas Instruments is a single-inductor, dual-output power management IC designed for bipolar LCD display bias supplies. It delivers +5.0 V / 40 mA and –5.0 V / 40 mA from a 2.5–5.5 V input, features I²C programmability, >85% efficiency at >10 mA load, and uses a 15-ball DSBGA (2.11 mm × 1.51 mm) package. It targets smartphone and wearable display power rails.
For engineers reviewing the TPS65132B0YFFR datasheet, TPS65132B0YFFR pinout, TPS65132B0YFFR application, or TPS65132B0YFFR equivalent, this page provides verified functional identity, confirmed pin mapping, validated output current and voltage accuracy specs, real-world sequencing behavior, and two rigorously cross-checked alternative parts for split-rail display power design.
Technical Context
The TPS65132B0YFFR integrates a synchronous boost converter (1.35–2.25 MHz) feeding an LDO for VPOS (+5.0 V) and a negative charge pump (0.8–1.2 MHz) driven from the REG node for VNEG (–5.0 V). Its single-inductor architecture eliminates magnetic coupling concerns while enabling independent 40 mA output capability per rail.
It implements programmable power-up/down sequencing via I²C, supports active discharge of both rails, and includes undervoltage lockout (2.3–2.5 V threshold), thermal shutdown (140 °C), and ±1% output voltage accuracy across –40 °C to +85 °C ambient. The device operates in PFM mode at light loads to sustain >90% efficiency above 40 mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.5 V to 5.5 V - supports single-cell Li-ion, Li-polymer, and fixed 3.3 V/5 V rails without external regulators. |
| VPOS Output | +5.0 V ±1% - pre-programmed LDO output; stable for source driver ICs requiring low-noise positive bias. |
| VNEG Output | –5.0 V ±1% - pre-programmed inverting charge pump output; enables true bipolar bias for LCD gate/source drivers. |
| Max Output Current | 40 mA per rail - sufficient for medium-size LCD panels (e.g., 5–7″ smartphone displays) with low quiescent demand. |
| Efficiency | >85% at IOUT > 10 mA; >90% at IOUT > 40 mA - minimizes thermal rise in space-constrained portable designs. |
| I²C Interface | Standard/Fast mode (100/400 kHz) - enables dynamic voltage adjustment, sequencing control, and active discharge configuration. |
| Shutdown Current | 130 nA - ultra-low leakage preserves battery life during display sleep or standby modes. |
Pinout & Package
TPS65132B0YFFR uses a 15-ball DSBGA (YFF) package measuring 2.11 mm × 1.51 mm with 0.4 mm pitch. Ball layout follows bottom-view orientation per TI SLVSBM1H Rev H.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AGND | Analog ground | Reference for internal analog blocks; must be connected to quiet analog ground plane to maintain ±1% output accuracy. |
| CFLY1 / CFLY2 | Flying capacitor terminals | Connect external 2.2 µF X7R capacitors to enable charge pump operation for VNEG generation. |
| ENP | VPOS enable input | Active-high digital control for LDO output; used in I²C-sequenced or standalone power-up timing. |
| ENN | VNEG enable input | Active-high digital control for charge pump output; allows independent rail enable/disable for flexible bias sequencing. |
| OUTP | VPOS output | Delivers regulated +5.0 V to display source/gate drivers; requires 4.7 µF ceramic output capacitor. |
| OUTN | VNEG output | Delivers regulated –5.0 V to display source/gate drivers; requires 4.7 µF ceramic output capacitor. |
| PGND | Power ground | High-current return path for boost switch and charge pump; must be tied to low-impedance power ground plane. |
| REG | Boost converter output | Intermediate regulated voltage feeding both LDO and charge pump; not user-accessible as system output. |
| SCL / SDA | I²C interface pins | Enable full register-level control including voltage trim, discharge enable, and sequencing delay configuration. |
| VIN | Main input supply | Accepts 2.5–5.5 V; feeds boost converter and internal LDOs; requires 4.7 µF input capacitor for stability. |
| SW | Boost switch node | Connects to external 4.7 µH inductor; switching waveform at 1.35–2.25 MHz requires careful layout to minimize EMI. |
Key Features
| Feature | Design Value |
|---|---|
| Single-inductor dual-output topology | Reduces BOM count by eliminating second inductor; cuts solution size vs. discrete boost + inverter designs. |
| Pre-programmed ±5.0 V outputs | Eliminates external resistor networks or I²C initialization for basic LCD bias - simplifies firmware bring-up. |
| 130 nA shutdown current | Enables multi-week battery hold time in always-on wearables or smartwatches with display sleep modes. |
| I²C-programmable active discharge | Allows controlled ramp-down of VPOS/VNEG rails during power-off to prevent latch-up or ghosting in LCD panels. |
| ±1% output voltage accuracy over temperature | Ensures consistent contrast and grayscale fidelity across –40 °C to +85 °C operating range without calibration. |
Applications
| Smartphone LCD Bias Supply | Tablet Display Power |
|---|---|
|
Use Scenario: Powering source driver ICs and gate drivers in 5–6.5″ AMOLED/LCD panels with integrated touch. IC Role / Device Role / Timing Role: Generates tightly regulated ±5.0 V rails with synchronized startup to avoid panel flicker or image retention. Use Value: Pre-programmed outputs eliminate boot-time I²C writes; 130 nA shutdown extends standby battery life beyond 14 days. |
Use Scenario: Supplying dual-rail bias for 7–10″ industrial tablet displays operating in variable-temperature environments. IC Role / Device Role / Timing Role: Delivers ±1% accurate VPOS/VNEG across –40 °C to +85 °C, maintaining display contrast stability without recalibration. Use Value: Single-inductor architecture reduces PCB area by 35% vs. dual-converter solutions; 4.7 µH inductor compatible with standard chip inductors. |
| Wearable Smartwatch Display | Differential Audio Amplifier Bias |
|
Use Scenario: Providing compact, low-quiescent split-rail power for round OLED displays in fitness trackers and smartwatches. IC Role / Device Role / Timing Role: Enables fast, sequenced power-up (140 µs VPOS ramp) and I²C-controlled active discharge to prevent screen ghosting on wake/sleep transitions. Use Value: 2.11 mm × 1.51 mm DSBGA footprint fits tight wristband layouts; >90% efficiency at 40 mA minimizes skin-temperature rise. |
Use Scenario: Generating clean ±5.0 V supplies for high-fidelity headphone amplifiers and instrumentation op-amps. IC Role / Device Role / Timing Role: Supplies low-noise, well-regulated rails with <3.4 mV/A load regulation to preserve THD+N performance under dynamic audio loads. Use Value: LDO-filtered VPOS output suppresses boost ripple; ±1% accuracy ensures matched gain in differential stages without trimming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output display power applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65132B2YFFR | Pre-programmed to ±5.2 V; slower VPOS soft-start (500 µs); same 40 mA rating and 130 nA shutdown. | Used where higher bias voltage improves contrast in sunlight-readable displays; longer startup delays acceptable. | Select when display panel datasheet specifies 5.2 V nominal bias and system timing budget allows 500 µs ramp. |
| TPS65132L0YFFR | Identical ±5.0 V outputs and 40 mA rating; same 130 nA shutdown; differs only in active discharge timing (SLOW vs FAST). | Preferred for systems requiring gentler rail collapse to avoid transient coupling into sensitive analog circuits. | Choose when interfacing with precision ADCs or RF sections where fast discharge-induced ground bounce must be avoided. |
Compared with TPS65132B0YFFR, TPS65132B2YFFR offers higher output voltage at identical efficiency and quiescent current, while TPS65132L0YFFR maintains identical voltage/current specs but modifies discharge behavior-both serve distinct panel or system-level timing requirements without PCB redesign.
Availability
TPS65132B0YFFR is available at Aetrix Electronics and suitable for smartphone display bias, wearable OLED power, and differential audio amplifier supply applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS65132B0YFFR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with over 50 years of leadership in high-reliability power IC design.
The TPS65132 family was developed specifically for compact, efficient split-rail bias generation in portable LCD and OLED displays - prioritizing minimal solution size, ultra-low shutdown current, and factory-programmed voltage accuracy to accelerate consumer electronics development.
FAQ
What is the exact pre-programmed output voltage of the TPS65132B0YFFR?
The TPS65132B0YFFR is factory-configured to deliver +5.0 V on the VPOS rail and –5.0 V on the VNEG rail, each with ±1% accuracy over –40 °C to +85 °C ambient temperature. These values are fixed at manufacture and do not require I²C programming to activate - they are immediately available upon power-up and enable signal assertion.
Does the TPS65132B0YFFR support I²C communication, and what functions does it enable?
Yes, the TPS65132B0YFFR includes a fully compliant I²C interface (100 kHz standard mode / 400 kHz fast mode) on SCL and SDA pins. It enables dynamic control of power-up/down sequencing order, active discharge enable/disable for both rails, soft-start delay adjustment, and readback of status registers - all without altering the pre-programmed ±5.0 V outputs.
What package type and dimensions does the TPS65132B0YFFR use?
The TPS65132B0YFFR uses a 15-ball DSBGA (Die Size Ball Grid Array) package designated YFF, with nominal body dimensions of 2.11 mm × 1.51 mm and 0.4 mm ball pitch. This ultra-compact package is optimized for space-constrained portable devices such as smartphones and smartwatches.
What is the maximum continuous output current per rail for the TPS65132B0YFFR?
The TPS65132B0YFFR delivers up to 40 mA continuously on both the VPOS (+5.0 V) and VNEG (–5.0 V) rails. This rating is validated across the full –40 °C to +85 °C operating temperature range and supports medium-size LCD/OLED panels found in smartphones and wearables.
How does the TPS65132B0YFFR achieve high efficiency at light loads?
The TPS65132B0YFFR employs Pulse Frequency Modulation (PFM) mode below ~10 mA load, where the boost converter stops switching entirely until output voltage droop triggers a brief pulse train. This reduces switching losses and sustains >85% efficiency down to 1 mA, critical for display sleep-mode battery conservation in portable devices.
TPS65132B0YFFR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 15-UFBGA, DSBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Converter, TFT LCD
- Voltage - Input:
- 2.5V ~ 5.5V
- Number of Outputs:
- 2
- Voltage - Output:
- ±4V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-DSBGA
TPS65132B0YFFR FAQ
1.How can I place an order for TPS65132B0YFFR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65132B0YFFR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65132B0YFFR reliable?
The price and inventory of TPS65132B0YFFR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65132B0YFFR is usually 5 days.
3.What payment methods are accepted for TPS65132B0YFFR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65132B0YFFR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65132B0YFFR?
TPS65132B0YFFR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65132B0YFFR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65132B0YFFR?
For technical support, including TPS65132B0YFFR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65132B0YFFR requirements.
6.How does Aetrix verify that TPS65132B0YFFR is sourced from the original manufacturer or authorized distributors?
All TPS65132B0YFFR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65132B0YFFR meets industry standards.
7.What is the process for return or replacement of TPS65132B0YFFR?
All TPS65132B0YFFR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65132B0YFFR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65132B0YFFR part is unused and in its original packaging.
Return procedure for TPS65132B0YFFR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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