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Texas Instruments TPS65197BRUYR
- Part No.:
- TPS65197BRUYR
- Manufacturer:
- Texas Instruments
- Category:
- Video Processing
- Package:
- 28-WFQFN Exposed Pad
- Datasheet:
-
TPS65197BRUYR.pdf
- Description:
- IC VIDEO LEVEL SHIFTER 28WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,858
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Product details
Overview
TPS65197BRUYR from Texas Instruments is an 8-channel LCD timing controller level-shifter IC for gate-in-panel (GIP) displays, supporting STV/RESET and six CLK outputs with selectable 0-/2-/3-channel charge-sharing, ±20 V to +45 V output voltage swing, 100-kHz clock operation, and panel discharge to VGH during shutdown. It operates in notebook, monitor, and TV display systems.
For engineers reviewing the TPS65197BRUYR datasheet, TPS65197BRUYR pinout, TPS65197BRUYR application, or TPS65197BRUYR equivalent, key selection criteria include VGH/VGL supply range compatibility, charge-sharing configuration flexibility, discharge-sense threshold behavior, and thermal shutdown response at 150 °C junction temperature.
Technical Context
The TPS65197BRUYR implements dual-level shifting architecture: two dedicated channels (STVOUT, RESETOUT) and six programmable clock channels (CLKOUT1–CLKOUT6), each with independent high- and low-side MOSFETs. It supports three charge-sharing modes selected via SEL_CS voltage (0–0.5 V, 1–2 V, or 2.8–6.5 V), enabling optimized power efficiency and image quality in GIP LCDs.
Its shutdown sequencing is governed by DIS_SENSE voltage threshold (1.17–1.36 V), triggering latched VGH-driven discharge of all outputs when asserted. Unlike the TPS65197B variant, the TPS65197BRUYR includes logic reset on STV pulse-forcing all CLKOUTx to VGL1 until first CLKIN1 rising edge-ensuring frame-synchronized startup.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VGH Range | 16.5 V to 45 V - sets maximum positive output voltage for gate driver signals |
| VGL1/VGL2 Range | –20 V to –3 V - defines negative rail capability for pull-down strength and signal swing |
| Charge-Sharing Modes | No / 2-channel / 3-channel - configurable via SEL_CS voltage to reduce dynamic power and improve settling |
| DIS_SENSE Threshold | 1.17–1.36 V - triggers latched panel discharge to VGH; must be held >1.36 V to disable discharge |
| UVLO Rising Threshold | 13.5–16.5 V on VGH - prevents operation below safe bias voltage; falling threshold is 2–5 V |
| Thermal Shutdown | 130–170 °C - latches outputs to high-Z; requires VGH <3.5 V to reset |
| Max Clock Frequency | 100 kHz - supports standard GIP timing requirements for notebook/monitor/TV panels |
Pinout & Package
TPS65197BRUYR is housed in a 28-pin WQFN package (4.0 mm × 4.0 mm) with exposed thermal pad connected to VGL1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLKIN1–CLKIN6 | Input | Logic-level clock inputs driving corresponding CLKOUTx channels |
| CLKOUT1–CLKOUT6 | I/O | Level-shifted high-voltage clock outputs; support charge-sharing when CS_x asserted |
| CS_1–CS_4 | I/O | Charge-sharing control inputs; CS_1–CS_3 enable 3-channel mode; CS_4 enables 2-channel mode |
| STVIN / STVOUT | Input / Output | Start-of-vertical-blank timing signal input and level-shifted output; triggers logic reset in TPS65197 |
| RESETIN / RESETOUT | Input / Output | Reset signal input and level-shifted output; no internal reset logic in TPS65197B, but present in TPS65197 |
| DISCH1 / DISCH2 | I/O | Panel discharge outputs tied internally to VGL1/VGL2 during operation, pulled to VGH during shutdown |
| DIS_SENSE | Input | Sense input for discharge activation; falling below 1.26 V initiates latched VGH discharge sequence |
| SEL_CS | Input | Charge-sharing mode selection: 0–0.5 V = disabled, 1–2 V = 3-channel, 2.8–6.5 V = 2-channel |
| VGH / VGL1 / VGL2 | Power | Positive (16.5–45 V), primary negative (–20 to –3 V), and secondary negative (–20 to –3 V) supplies |
| GND | Reference | Signal ground reference for logic inputs and internal circuitry |
Key Features
| Feature | Design Value |
|---|---|
| 8-channel level-shifting | Supports STV/RESET + 6 clocks with independent high/low-side drive for full GIP timing control |
| Selectable charge-sharing | Reduces dynamic current and improves image uniformity via 2- or 3-channel coupling during active display |
| Latched shutdown discharge | Ensures reliable panel discharge to VGH upon power-down without external supervision or timing constraints |
| T-CON failure detection | STV pulse-triggered logic reset forces CLKOUTx to VGL1, preventing erroneous gate activation from faulty T-CON |
| Thermal protection with latch | Prevents device damage under overload; requires full VGH ramp-down to clear, ensuring safe recovery |
Applications
| Gate-in-Panel Notebook Display | Monitor Timing Control |
|---|---|
|
Use Scenario: Driving gate lines of high-resolution IPS panels in ultrabooks with tight power budgets. IC Role / Device Role / Timing Role: Level-shifter converting T-CON's 3.3 V logic clocks and STV/RESET into ±15 V to +35 V GIP signals. Use Value: Enables 2-channel charge-sharing to reduce switching losses by ~35% versus no-sharing mode while maintaining 100-kHz frame sync. |
Use Scenario: Supporting dual-channel LVDS-to-GIP conversion in 27-inch 4K monitors with variable refresh rate. IC Role / Device Role / Timing Role: Generating synchronized high-voltage clock outputs with precise propagation delay matching (<100 ns skew). Use Value: Achieves <±5 ns inter-channel clock skew using matched trace routing and internal slew-rate control (50–150 V/µs). |
| Smart TV Panel Interface | Industrial HMI Display |
|
Use Scenario: Powering 55-inch UHD TV panels requiring robust discharge during rapid power cycling. IC Role / Device Role / Timing Role: Providing VGH-referenced DISCH1/DISCH2 outputs that clamp all gate lines to positive rail during shutdown. Use Value: Eliminates ghosting and residual image artifacts by discharging panel capacitance within 200 µs via internal 14–60 Ω rDS(on). |
Use Scenario: Operating in extended-temperature industrial HMIs exposed to thermal cycling and ESD events. IC Role / Device Role / Timing Role: Delivering fault-tolerant level-shifting with undervoltage lockout (13.5–16.5 V) and ±2000-V HBM ESD rating. Use Value: Maintains functional integrity across –40 °C to +85 °C ambient with thermal shutdown at 130–170 °C junction temperature. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LCD level-shifting applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65197BRYR | Same pinout and electrical specs, but lacks STV-triggered logic reset; CLKOUTx always follow inputs at startup | Preferred where T-CON reliability is assured and deterministic frame-aligned reset is unnecessary | Choose TPS65197BRYR only if system design omits STV-based synchronization and requires simpler startup behavior |
| TPS65195RUKR | 6-channel level-shifter (no STV/RESET), lower VGH max (32 V), no charge-sharing, smaller 20-pin QFN | Suitable for cost-sensitive, lower-resolution panels without advanced power optimization needs | Use TPS65195RUKR when panel size ≤15.6″, VGH ≤32 V, and charge-sharing is not required for image quality |
Compared with TPS65197BRYR and TPS65195RUKR, the TPS65197BRUYR uniquely delivers STV-synchronized logic reset, full 8-channel coverage including STV/RESET, and configurable charge-sharing-making it the only option for high-end GIP notebooks requiring guaranteed frame-aligned startup and dynamic power tuning.
Availability
TPS65197BRUYR is available at Aetrix Electronics and suitable for notebook display designs, monitor timing subsystems, and smart TV panel interfaces requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS65197BRUYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in precision analog and display interface solutions.
The TPS65197 product line was designed specifically for gate-in-panel LCD timing control, delivering integrated level-shifting, charge-sharing, and panel discharge in a single compact package for high-resolution consumer and industrial displays.
FAQ
What is the function of the DIS_SENSE pin on the TPS65197BRUYR?
The DIS_SENSE pin on the TPS65197BRUYR detects panel discharge initiation: when its voltage falls below 1.17–1.36 V, the device latches all outputs to VGH for rapid panel discharge. To disable discharge, DIS_SENSE must remain above 1.36 V-typically tied to 3.3 V. This behavior is identical across all TPS65197 variants, including the TPS65197BRUYR.
How does the TPS65197BRUYR differ from the TPS65197BRYR?
The TPS65197BRUYR includes STV pulse-triggered logic reset-forcing CLKOUT1–CLKOUT6 to VGL1 until the first CLKIN1 rising edge-while the TPS65197BRYR lacks this feature and follows inputs immediately at startup. Both share identical pinout, VGH/VGL ranges, charge-sharing modes, and discharge behavior. The TPS65197BRUYR is the correct choice when frame-aligned initialization is required.
What are the valid voltage ranges for VGH and VGL supplies on the TPS65197BRUYR?
The TPS65197BRUYR requires VGH between 16.5 V and 45 V, VGL1 between –20 V and –3 V, and VGL2 between –20 V and –3 V. VGL1 must be more negative than or equal to VGL2, and the differential VGH – VGLx must not exceed 60 V. These ranges are specified in the TPS65197BRUYR datasheet Section 7.3 and apply strictly to this part number.
Can the TPS65197BRUYR operate without charge-sharing enabled?
Yes-the TPS65197BRUYR supports no charge-sharing mode when SEL_CS is held below 0.5 V (e.g., grounded). In this state, all six CLKOUT channels operate independently with no inter-channel coupling. Charge-sharing is fully optional and configured solely by SEL_CS voltage; disabling it has no impact on STVOUT, RESETOUT, or discharge functionality in the TPS65197BRUYR.
What thermal management is required for reliable operation of the TPS65197BRUYR?
The TPS65197BRUYR requires a minimum 10 cm² copper area connected to its exposed thermal pad (tied to VGL1) via multiple vias. Its RθJA is 34.5 °C/W; exceeding 125 °C junction temperature triggers thermal shutdown at 130–170 °C. Layout guidelines mandate short, wide traces for VGH/VGL1 decoupling and avoidance of heat-generating resistors near the IC-critical for sustained operation in the TPS65197BRUYR.
TPS65197BRUYR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Shifter
- Applications:
- Video Display
- Standards:
- -
- Control Interface:
- -
- Voltage - Supply:
- 16.5V ~ 45.0V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 28-WQFN (4x4)
TPS65197BRUYR FAQ
1.How can I place an order for TPS65197BRUYR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65197BRUYR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65197BRUYR reliable?
The price and inventory of TPS65197BRUYR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65197BRUYR is usually 5 days.
3.What payment methods are accepted for TPS65197BRUYR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65197BRUYR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65197BRUYR?
TPS65197BRUYR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65197BRUYR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65197BRUYR?
For technical support, including TPS65197BRUYR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65197BRUYR requirements.
6.How does Aetrix verify that TPS65197BRUYR is sourced from the original manufacturer or authorized distributors?
All TPS65197BRUYR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65197BRUYR meets industry standards.
7.What is the process for return or replacement of TPS65197BRUYR?
All TPS65197BRUYR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65197BRUYR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65197BRUYR part is unused and in its original packaging.
Return procedure for TPS65197BRUYR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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