Texas Instruments TPS65198RUYR

Overview

TPS65198RUYR from Texas Instruments is a 13-channel integrated level shifter with high-speed operational amplifier, designed for LCD TV and monitor timing controllers using Gate-in-Panel (GIP) architecture. It delivers six CLK outputs, VST/RESET, ODD/EVEN, VGH_F/VGH_R, DISCHARGE, and buffered VCOM via its op-amp - all operating across –40°C to 85°C with VGH1/VGL supply range up to 56 V differential.

For engineers reviewing the TPS65198RUYR datasheet, TPS65198RUYR pinout, TPS65198RUYR application, or TPS65198RUYR equivalent, key selection criteria include GIP-compatible state machine sequencing, bi-directional panel drive support (forward/reverse), abnormal operation detection (EO/GST), gate shaping via external RE resistor, and integrated panel discharge with VSENSE threshold control.

Technical Context

The TPS65198RUYR implements a deterministic state machine that synthesizes twelve level-shifted outputs-including six phase-aligned CLKs (60° spacing), dual VGH control (VGH_F/VGH_R), and frame-synchronized VST/RESET-from five T-CON inputs (GCLK, MCLK, GST, EO, BI-SCAN). Its gate-shaping function uses external RE to modulate CLK fall time for flicker reduction.

Abnormal operation detection forces outputs to safe VGL state when EO rises coincident with GST rising edge; panel discharge activates when VSENSE falls below 1.5 V (±0.225 V hysteresis); and the integrated 70 MHz op-amp buffers VCOM with 414 mA peak output current, 80 dB PSRR, and 90 dB CMRR - all referenced to AVDD (8–20 V).

Key Specifications

Pinout & Package

TPS65198RUYR is housed in a thermally enhanced 28-pin 4×4 mm WQFN (RUY) package with exposed thermal die connected to VGL. Pin 1 is CLK1; pin 28 is BI-SCAN; pins 22 (GND) and exposed thermal pad are tied to system ground plane for optimal thermal dissipation and noise immunity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LCD panel level shifting applications.

Compared with TPS65197RUYR and MAX16260ETL+, the TPS65198RUYR uniquely integrates VCOM buffering, panel discharge, and BI-SCAN latching - enabling single-chip GIP solutions for next-gen displays without compromising safety or image quality.

Availability

TPS65198RUYR is available at Aetrix Electronics and suitable for large-screen LCD TVs, high-resolution monitors, industrial HMIs, medical imaging subsystems, and automotive infotainment displays requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.

Supply support for TPS65198RUYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and digital signal technologies - with over 50 years of innovation in power management and display interface ICs.

The TPS65198RUYR belongs to TI's LCD panel power and timing IC portfolio, engineered specifically to consolidate GIP timing functions, gate driving, and VCOM conditioning into one compact, thermally optimized package for cost-sensitive, high-reliability display systems.

FAQ

What is the primary function of the TPS65198RUYR in an LCD display system?

The TPS65198RUYR serves as a fully integrated GIP timing controller interface IC. It translates five T-CON input signals (GCLK, MCLK, GST, EO, BI-SCAN) into thirteen synchronized, high-voltage level-shifted outputs - including six CLKs, VST/RESET, ODD/EVEN, VGH_F/VGH_R, DISCHG, and a dedicated VCOM op-amp output - enabling direct drive of large-panel LCD gate lines and common voltage networks without external support circuitry. This consolidation is central to its role in TPS65198RUYR-based display designs.

How does the TPS65198RUYR handle abnormal operation conditions?

The TPS65198RUYR detects abnormal operation when the EO signal rises coincident with the rising edge of GST. Upon detection, it forces CLK1–CLK6, VST, and RESET to VGL (safe low state), holds ODD/EVEN in their power-up state (EVEN high, ODD low), and leaves VGH_F/VGH_R unchanged - ensuring no unintended gate activation while preserving directional control. Normal operation resumes automatically when EO is low at the next GST rising edge. This behavior is hardwired in the TPS65198RUYR state machine and requires no external intervention.

Can the TPS65198RUYR support both forward and reverse panel scanning directions?

Yes, the TPS65198RUYR supports bidirectional scanning via the BI-SCAN input. When BI-SCAN is low, VGH_F is active and CLK sequence follows 4→5→6→1→2→3; when high, VGH_R is active and sequence reverses to 3→2→1→6→5→4. Critically, the BI-SCAN signal is latched on every GST rising edge, and VGH_F/VGH_R outputs incorporate programmable dead time (t12/t13 = 20–1000 ns) to prevent cross-conduction - a core capability of the TPS65198RUYR not found in most competing level shifters.

What is the purpose of the RE pin on the TPS65198RUYR, and how is it used?

The RE pin on the TPS65198RUYR connects to an external resistor that sets the gate-shaping fall time for CLK1–CLK6 outputs. During MCLK rising edge, internal transistor Q3 enables and discharges the LCD gate line through RE, controlling slew rate to reduce image flicker. The TPS65198RUYR datasheet specifies r_DS(ON) = 70 Ω for this path, meaning total fall time depends on RE value and panel capacitance. This analog tuning method replaces complex digital gate-shaping logic - a distinctive implementation in the TPS65198RUYR architecture.

Does the TPS65198RUYR include protection against improper power sequencing?

Yes, the TPS65198RUYR incorporates multiple sequencing safeguards. Its UVLO circuit disables level shifting below VGH1 = 3.4 V (falling) or 9.2 V (rising); VSENSE monitoring forces DISCHG activation when VSENSE drops below 1.5 V; and power-up sequencing ensures CLKs track VGL until VGH1 exceeds UVLO and VSENSE exceeds threshold - preventing partial activation. These protections are intrinsic to the TPS65198RUYR design and operate independently of external control, enhancing system robustness in variable-input-power environments.