Texas Instruments TPS65198RUYT

Overview

TPS65198RUYT from Texas Instruments is a 13-channel integrated level shifter with high-speed operational amplifier, designed for LCD TV and monitor gate-in-panel (GIP) timing control. It delivers six CLK outputs, VST/RESET, ODD/EVEN, VGH_F/VGH_R, DISCHARGE, and a dedicated op-amp for VCOM buffering - supporting forward/reverse panel drive with gate shaping via external RE resistor.

For engineers reviewing the TPS65198RUYT datasheet, TPS65198RUYT pinout, TPS65198RUYT application, or TPS65198RUYT equivalent, key selection considerations include its 28-pin 4×4 mm QFN package, dual positive/negative supply operation (VGH1/VGH2 up to 38 V, VGL down to –23 V), 70 MHz op-amp bandwidth, 50–100 ns propagation delays, and built-in abnormal operation detection using EO/GST signals.

Technical Context

The TPS65198RUYT implements a deterministic state machine that synthesizes twelve level-shifted outputs (CLK1–CLK6, VST, RESET, ODD, EVEN, VGH_F, VGH_R) from five timing inputs (GCLK, MCLK, GST, EO, BI-SCAN), with phase-controlled 60° clock sequencing and bi-directional scan order selection. Its gate-shaping architecture uses an external resistor (RE) to control CLK fall-time slew rate for flicker reduction.

Panel discharge is managed via a Schmitt-triggered VSENSE input (1.275–1.725 V threshold, 100 mV hysteresis) that forces DISCHG high during power-down; the integrated op-amp features 70 MHz unity-gain bandwidth, 414 mA peak output current, and rail-to-rail output capability optimized for dynamic VCOM loads in high-resolution GIP displays.

Key Specifications

Pinout & Package

The TPS65198RUYT is housed in a thermally enhanced 28-pin WQFN (RUY) package measuring 4 mm × 4 mm × 0.8 mm, with exposed thermal die connected to VGL for efficient heat dissipation in high-power GIP applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LCD timing interface applications.

Compared with TPS65197RUYT and TPS65199RUYT, the TPS65198RUYT uniquely integrates a 70 MHz VCOM op-amp - enabling single-chip VCOM+timing solutions for consumer LCD TVs - while maintaining full pin compatibility with the TPS65197 and offering lower system-level cost than the higher-voltage TPS65199.

Availability

TPS65198RUYT is available at Aetrix Electronics and suitable for LCD TV manufacturing, monitor production, and GIP-based display module development requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for TPS65198RUYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and digital signal technologies, with over 50 years of innovation in power management and interface solutions.

The TPS65198RUYT belongs to TI's LCD timing interface product line, engineered specifically to consolidate gate driver timing, panel discharge, and VCOM buffering functions into one IC for GIP-based high-resolution displays.

FAQ

What is the primary function of the TPS65198RUYT in an LCD TV design?

The TPS65198RUYT serves as a fully integrated timing interface IC for Gate-In-Panel (GIP) LCD systems. It translates low-voltage timing controller (T-CON) signals into high-voltage gate drive waveforms - generating six phase-aligned CLK outputs, VST/RESET, ODD/EVEN group selects, VGH_F/VGH_R direction controls, DISCHARGE for panel power-down, and a dedicated 70 MHz op-amp for VCOM buffering. This consolidation eliminates multiple discrete level shifters, logic gates, and op-amps in the signal path.

How does the TPS65198RUYT handle abnormal operation detection?

The TPS65198RUYT detects abnormal operation when the EO signal is high during the rising edge of GST. Upon detection, it forces all level shifter outputs (CLK1–CLK6, VST, RESET, ODD, EVEN) into a safe state - pulling CLKs low, holding VST/RESET low, and setting ODD/EVEN to their power-up state (EVEN high, ODD low). VGH_F/VGH_R remain unchanged and continue following BI-SCAN. Normal operation resumes automatically when EO is low at the next GST rising edge.

What is the role of the RE pin on the TPS65198RUYT?

The RE pin on the TPS65198RUYT connects to an external resistor that sets the gate-shaping slew rate for CLK1–CLK6 outputs. During the MCLK-defined gate-shaping interval, the CLK output discharges through this resistor to control fall-time and reduce image flicker. The datasheet specifies a typical gate-shaping resistance of 70 Ω measured at 10 mA, and the value is selected based on panel capacitance and desired transition time - enabling flicker optimization without modifying timing controller firmware.

Does the TPS65198RUYT support both forward and reverse panel scanning?

Yes, the TPS65198RUYT supports bidirectional panel scanning via the BI-SCAN input. When BI-SCAN is low, the device operates in forward mode: VGH_F goes high, VGH_R stays low, and CLK outputs sequence as 4–5–6–1–2–3. When BI-SCAN is high, it switches to reverse mode: VGH_R goes high, VGH_F goes low, and CLKs sequence as 3–2–1–6–5–4. The BI-SCAN signal is internally pulled down with a 100 kΩ resistor, ensuring default forward operation if left unconnected.

What are the supply voltage requirements for the TPS65198RUYT's level shifter and op-amp sections?

The TPS65198RUYT requires three independent supply domains: VGH1 (15–38 V) powers CLK1–CLK6, VST, RESET, DISCHG, and VGH_F; VGH2 (15–38 V) powers ODD and EVEN; VGL (–3 to –23 V) serves as the negative rail for all level shifters; and AVDD (8–20 V) supplies the integrated op-amp. The device incorporates UVLO circuitry that holds outputs in safe VGL state if VGH1 falls below 3.4 V (falling) or 9.2 V (rising), ensuring robust power sequencing compliance.