Texas Instruments TPS652510RHAR
- Part No.:
- TPS652510RHAR
- Manufacturer:
- Texas Instruments
- Package:
- 40-VFQFN Exposed Pad
- Datasheet:
-
TPS652510RHAR.pdf
- Description:
- IC REG BCK ADJ 3A/2A TRPL 40VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS652510RHAR from Texas Instruments is a triple-output synchronous step-down DC-DC power management IC with integrated high-side and low-side MOSFETs. It delivers 3 A (Buck1), 2 A (Buck2), and 2 A (Buck3) continuous output current across 4.5 V–16 V input, features adjustable 300 kHz–2.2 MHz switching frequency via ROSC resistor, 0.8 V ±1% reference, and supports pre-biased outputs in industrial motor drives and embedded computing power rails.
For engineers reviewing the TPS652510RHAR datasheet, TPS652510RHAR pinout, TPS652510RHAR application, or TPS652510RHAR equivalent, key selection criteria include per-channel enable/soft-start/current-limit configuration, out-of-phase Buck1/Buck2 operation to reduce input ripple, hiccup-mode overcurrent protection, and thermal shutdown with 160°C trip point and 20°C hysteresis.
Technical Context
The TPS652510RHAR implements peak current-mode control with built-in slope compensation to prevent subharmonic oscillation, enabling stable loop compensation using a Type II network. Each buck converter operates with independent external enable, soft-start, and current-limit pins-allowing sequenced startup, adjustable ramp time, and fine-tuned overcurrent thresholds via RLIM resistors.
It integrates dual internal bias rails (V3V at 3.3 V/10 mA and V7V at 6.25 V/10 mA), supports automatic PFM/PWM mode transition for light-load efficiency, and includes overvoltage protection (OVP) triggered at 109% of 0.8 V reference with 2% hysteresis. The three converters operate 180° out-of-phase between Buck1 and Buck2 to minimize input capacitor RMS current and EMI.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 16 V - supports 5 V, 9 V, 12 V, and 15 V intermediate bus systems without external LDO pre-regulation. |
| Output Current (Continuous) | Buck1: 3 A; Buck2 & Buck3: 2 A each - enables single-chip supply for multi-rail SoC or FPGA core/I/O/memory domains. |
| Switching Frequency | 300 kHz to 2.2 MHz - set externally via ROSC resistor; allows optimization of inductor size, efficiency, and EMI filtering. |
| Feedback Reference | 0.8 V ±1% - enables precise output voltage setting from 0.8 V up to VIN minus conduction losses using resistor dividers. |
| Thermal Shutdown | 160°C trip / 140°C restart - 20°C hysteresis prevents thermal oscillation during sustained overload or poor heatsinking. |
| Operating Junction Temp | –40°C to +125°C - qualified for industrial and extended-temperature embedded applications including motor control and networking equipment. |
| Package | 40-pin QFN (6 mm × 6 mm, RHA) with PowerPAD - provides low thermal resistance (θJA = 30°C/W) and robust PCB thermal coupling. |
Pinout & Package
The TPS652510RHAR is housed in a thermally enhanced 40-pin QFN package (RHA) with exposed PowerPAD for electrical and thermal grounding. Pin numbering follows TI standard QFN layout; unused pins (UC) must be connected to ground.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1, EN2, EN3 | Independent enable inputs | Each controls startup timing; weak 1 MΩ pull-up to V3V allows RC-delayed sequencing (≈1.67 ms/nF). |
| SS1, SS2, SS3 | Soft-start current sources | 5 µA internal source charges external capacitor; sets controlled output ramp time (e.g., 4.7 nF → ~0.8 ms). |
| RLIM1, RLIM2, RLIM3 | Current limit programming | Resistor-to-ground sets peak inductor current: Buck1 up to 5.05 A, Buck2/Buck3 up to 4.7 A. |
| FB1, FB2, FB3 | Feedback inputs | Monitor output voltage via resistor divider; reference is 0.8 V ±1%, supporting pre-biased start-up. |
| LX1/LX2/LX3 (dual pins each) | Switching node outputs | High-current paths for external inductors; require low-inductance layout and ceramic bootstrap capacitors (47 nF). |
| ROSC | Oscillator frequency set | Resistor-to-ground selects switching frequency from 300 kHz to 2.2 MHz; accuracy ±10% at 800 kHz. |
| PGOOD | Open-drain power-good indicator | Asserts high when all outputs are ≥90% nominal; pulls low if any drops ≤85%; default active-high polarity. |
| F_PWM | Forced PWM mode control | High forces continuous PWM; low enables automatic PFM/PWM transition for >2% ripple suppression at light loads. |
Key Features
| Feature | Design Value |
|---|---|
| Triple synchronous buck converters | Integrated high-side (95/120 mΩ) and low-side (50/80 mΩ) FETs per channel eliminate external MOSFETs and drivers. |
| Adjustable per-channel current limit | RLIM pins accept 75 kΩ–300 kΩ resistors to set Buck1 current limit from 1.2 A to 5.05 A, Buck2/Buck3 from 1.2 A to 4.7 A. |
| Hiccup-mode overcurrent protection | Shuts down affected converter for 10 ms after >10 ms overload; global hiccup only if fault persists - avoids latch-off during transient surges. |
| Out-of-phase Buck1/Buck2 operation | 180° phase shift reduces input capacitor RMS current by ~30%, lowering required capacitance and EMI filter size. |
| Pre-biased output support | Enables safe startup into powered-down systems (e.g., hot-swap, partial power-down) without reverse current flow. |
Applications
| Industrial Motor Drives | Embedded Computing Platforms |
|---|---|
Use Scenario: Powering gate drivers, microcontrollers, and isolated I/O in servo drives operating from 12 V or 24 V DC bus. IC Role / Device Role / Timing Role: Primary multi-rail PMIC delivering 1.2 V (CPU core), 1.8 V (I/O), and 3.3 V (peripherals) with sequenced startup and hiccup protection against motor stall currents. Use Value: Eliminates discrete regulators and sequencing ICs; 3 A Buck1 handles peak CPU load while 2 A Buck2/Buck3 sustain logic and interface rails under dynamic torque changes. | Use Scenario: Supplying heterogeneous SoCs (e.g., ARM + FPGA + DDR) in edge AI gateways with strict thermal and space constraints. IC Role / Device Role / Timing Role: Centralized power controller managing rail sequencing, soft-start, and PGOOD assertion before firmware execution begins. Use Value: Reduces BOM count by 6+ components; out-of-phase operation cuts input ripple, allowing smaller 10 µF X7R ceramics instead of larger bulk capacitors. |
| Networking Equipment | Automotive Infotainment Systems |
Use Scenario: Providing regulated supplies to Ethernet PHYs, packet processors, and memory in compact 1U switches. IC Role / Device Role / Timing Role: Triple-buck regulator with programmable frequency (500 kHz typical) to avoid noise coupling into sensitive analog receive paths. Use Value: Adjustable ROSC resistor enables EMI tuning; PFM mode maintains >85% efficiency at 50 mA standby load, extending system uptime during low-traffic periods. | Use Scenario: Powering display controllers, audio codecs, and touch processors in head units powered from 9–16 V automotive battery. IC Role / Device Role / Timing Role: Robust PMIC with –40°C to +125°C operation, UVLO (4.1 V), and OVP (109% ref) protecting against load-dump and cold-crank transients. Use Value: Integrated V3V/V7V bias rails simplify auxiliary supply design; thermal shutdown ensures reliability during prolonged high-ambient cabin operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-output synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS652510RGET | Same die, 24-pin QFN (4 mm × 4 mm, RGE); lower current rating (2 A/1.5 A/1.5 A); no V7V rail; θJA = 42°C/W. | Suitable for space-constrained, lower-power applications where 3 A Buck1 and dual 2 A rails are not required. | Select RGET only if board area is critical and total output current demand is ≤5 A with relaxed thermal margin. |
| TPS65261RHBR | Triple buck with 3 A/2 A/2 A ratings, but fixed 500 kHz frequency; no ROSC pin; lacks F_PWM control and pre-bias support. | Targeted at cost-sensitive designs where frequency flexibility and advanced light-load modes are unnecessary. | Choose RHBR for simplified layout and qualification if 500 kHz is acceptable and PFM operation is not needed for standby efficiency. |
Compared with TPS652510RGET, the TPS652510RHAR delivers higher current, better thermal performance, and full feature parity; versus TPS65261RHBR, it adds frequency adjustability, forced-PWM control, and pre-biased startup-critical for complex SoC power sequencing.
Availability
TPS652510RHAR is available at Aetrix Electronics and suitable for industrial motor drives, embedded computing platforms, and networking equipment requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS652510RHAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power solutions.
The TPS652510RHAR belongs to TI's high-current multi-rail PMIC product line, designed specifically for industrial and embedded systems needing compact, thermally efficient, and highly configurable DC-DC conversion with robust protection and sequencing.
FAQ
What is the maximum continuous output current per channel on the TPS652510RHAR?
The TPS652510RHAR supports 3 A continuous output current on Buck1 and 2 A continuous on both Buck2 and Buck3 under recommended operating conditions (TA ≤ 85°C, proper PCB thermal design). Peak current capability reaches 3.5 A (Buck1) and 2.5 A (Buck2/Buck3) before hiccup-mode activation. These values assume adequate copper area, airflow, and use of the 6 mm × 6 mm QFN PowerPAD for thermal dissipation.
How does the TPS652510RHAR handle overcurrent conditions?
The TPS652510RHAR uses per-channel cycle-by-cycle current limiting with hiccup-mode recovery. If an overcurrent event lasts longer than 10 ms, the affected buck shuts down for 10 ms before attempting restart. If the fault persists, it repeats the cycle. For sub-10 ms events, only the impacted channel resets-others remain operational. This behavior is implemented in hardware and requires no external circuitry.
Can the TPS652510RHAR start up into a pre-biased output?
Yes, the TPS652510RHAR supports pre-biased output startup on all three buck channels. Its current-mode architecture and internal control logic prevent reverse current flow during start-up, making it suitable for hot-swap and partial-power-down systems. This functionality is enabled by default and requires no configuration-only proper feedback divider connection and stable input voltage.
What is the purpose of the F_PWM pin on the TPS652510RHAR?
The F_PWM pin on the TPS652510RHAR forces all three buck converters into continuous PWM mode when driven high. When pulled low (or left floating, due to internal pull-down), the device automatically transitions between PWM and PFM modes based on load. This pin enables deterministic light-load behavior-critical for noise-sensitive applications where PFM-induced frequency variation must be avoided.
Does the TPS652510RHAR integrate internal bias supplies, and what are their specifications?
Yes, the TPS652510RHAR integrates two internal LDOs: V3V (3.3 V ±3%, 10 mA max) and V7V (6.25 V ±10%, 10 mA max). V3V powers internal logic and EN pin pull-ups; V7V supplies gate drivers and analog circuitry. Both require external ceramic decoupling (3.3–10 µF for V3V; 4.7–10 µF for V7V) connected directly to ground. Neither rail is user-adjustable or externally controllable.
TPS652510RHAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 40-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 16V
- Current - Output:
- 3A, 2A
- Frequency - Switching:
- 300kHz ~ 2.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-VQFN (6x6)
TPS652510RHAR FAQ
1.How can I place an order for TPS652510RHAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS652510RHAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS652510RHAR reliable?
The price and inventory of TPS652510RHAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS652510RHAR is usually 5 days.
3.What payment methods are accepted for TPS652510RHAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS652510RHAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS652510RHAR?
TPS652510RHAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS652510RHAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS652510RHAR?
For technical support, including TPS652510RHAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS652510RHAR requirements.
6.How does Aetrix verify that TPS652510RHAR is sourced from the original manufacturer or authorized distributors?
All TPS652510RHAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS652510RHAR meets industry standards.
7.What is the process for return or replacement of TPS652510RHAR?
All TPS652510RHAR units undergo pre-shipment inspection (PSI). If there is an issue with TPS652510RHAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS652510RHAR part is unused and in its original packaging.
Return procedure for TPS652510RHAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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