Texas Instruments TPS65261-1RHBR
- Part No.:
- TPS65261-1RHBR
- Manufacturer:
- Texas Instruments
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS65261-1RHBR.pdf
- Description:
- IC REG BCK ADJ 3A/2A TRPL 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:7,031
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS65261-1RHBR from Texas Instruments is a monolithic triple synchronous step-down DC/DC converter delivering 3-A, 2-A, and 2-A output currents across three independent buck channels. It operates from a 4.5-V to 18-V input supply, features a 0.6-V ±1% feedback reference, supports adjustable switching frequency (250 kHz–2 MHz), and implements forced continuous conduction mode (FCCM) for low-noise operation in set-top boxes and home gateways.
For engineers reviewing the TPS65261-1RHBR datasheet, TPS65261-1RHBR pinout, TPS65261-1RHBR application, or TPS65261-1RHBR equivalent, this page delivers verified electrical parameters, validated thermal performance (RθJA = 31.6°C/W), confirmed FCCM light-load behavior, exact VQFN-32 (RHB) package mapping, and two rigorously cross-referenced alternative parts with documented functional distinctions.
Technical Context
The TPS65261-1RHBR uses constant-frequency peak-current-mode control per channel, with Buck1 operating 180° out-of-phase from Buck2/Buck3 to minimize input ripple and reduce bulk capacitor requirements. Each buck has dedicated EN, SS, FB, COMP, BST, and LX pins enabling independent sequencing, soft-start, loop compensation, and bootstrap management.
It integrates a 6.3-V internal LDO (V7V) for gate driver bias, monitors input voltage via VDIV for power-fail detection, asserts open-drain PGOOD when all outputs are within ±5% of regulation, and provides hiccup-mode overcurrent protection with 256-cycle wait time and 8192-cycle restart delay after thermal shutdown at 160°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports common intermediate bus rails (5 V, 9 V, 12 V, 15 V) without external pre-regulation. |
| Output Currents | 3 A / 2 A / 2 A - enables single-chip power delivery for multi-rail SoC or FPGA core/I/O/auxiliary supplies. |
| Feedback Reference | 0.6 V ±1% - enables precise output voltage setting (e.g., 1.2 V, 1.8 V, 3.3 V) with standard 1% resistor dividers. |
| Switching Frequency | 250 kHz to 2 MHz - adjustable via ROSC pin resistor; higher frequencies shrink inductors/capacitors; lower frequencies improve light-load efficiency in FCCM. |
| Light-Load Mode | Forced Continuous Conduction Mode (FCCM) - eliminates audible noise and RF interference vs. PSM; ensures stable regulation under dynamic load steps. |
| Thermal Protection | 160°C trip with 20°C hysteresis - prevents permanent damage during sustained overload or poor PCB thermal design. |
| Quiescent Current | 605 µA (all bucks enabled, no switching) - minimizes standby power loss in always-on consumer electronics. |
Pinout & Package
VQFN-32 (RHB) package: 5-mm × 5-mm, 0.5-mm pitch, exposed thermal pad soldered to PCB ground plane for optimal thermal performance (RθJC(bot) = 0.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1 / EN2 / EN3 | Independent enable inputs | Float to enable; support UVLO adjustment via resistor divider; internal 3.6-µA pullup ensures default startup. |
| FB1 / FB2 / FB3 | Feedback sensing inputs | Kelvin-connected to output resistive dividers; monitor regulated voltage with 0.6-V reference for ±1% accuracy. |
| LX1 / LX2 / LX3 | Switching node outputs | Drive external inductors; voltage swing spans diode-drop below GND to respective PVINx; require tight layout to PGND. |
| BST1 / BST2 / BST3 | Bootstrap supply terminals | Connect 47-nF capacitor to corresponding LX pin to generate high-side gate drive voltage; monitored for UVLO recharging. |
| PGOOD | Open-drain power-good indicator | Asserts high only when all three outputs are within regulation (±5%) and power-up sequence completes. |
| RESET | Open-drain power-fail signal | Asserts low when input voltage drops below VDIV threshold (1.23 V typical); deglitched with 12–16 cycle falling-edge filter. |
| ROSC | Oscillator frequency programming | Connect external resistor to GND to set fSW; 73.2-kΩ yields 600 kHz; supports optimization of EMI, size, and efficiency. |
| MODE | Power sequencing control | High enables automatic staggered startup/shutdown of bucks; timing controlled by internal 1024-cycle delay between channels. |
Key Features
| Feature | Design Value |
|---|---|
| Dedicated per-buck EN/SS/COMP/FB pins | Enables independent voltage sequencing, soft-start timing, and loop compensation tuning for each rail without shared components. |
| 180° phase shift between Buck1 and Buck2/Buck3 | Reduces RMS input current ripple by ~30%, allowing smaller input bulk capacitors and lower EMI filter component count. |
| FCCM operation (TPS65261-1 only) | Eliminates low-frequency switching discontinuities, preventing audible coil whine and reducing conducted EMI in sensitive RF environments. |
| Integrated V7V LDO (6.3 V, 175 mA) | Provides stable gate-drive bias for all three high-side MOSFETs; eliminates need for external bias supply and associated BOM cost. |
| Pre-biased load startup capability | Supports monotonic ramp-up into powered systems (e.g., hot-swap modules) without output voltage reversal or latch-up. |
Applications
| Set-Top Box Power Management | Home Gateway Router |
|---|---|
|
Use Scenario: Powers SoC core (1.2 V), memory I/O (1.8 V), and PHY/interface (3.3 V) rails from a 12-V wall adapter. IC Role / Device Role / Timing Role: Triple-buck regulator providing isolated, sequenced, and regulated DC outputs with integrated power-good monitoring. Use Value: Single-chip solution reduces board area by >40% vs. discrete buck ICs; FCCM ensures clean 3.3-V USB PHY supply free of switching noise. |
Use Scenario: Supplies CPU core, DDR3 memory, and wireless baseband ICs in 802.11ac access points operating from 5-V or 12-V input. IC Role / Device Role / Timing Role: Primary multi-rail PMIC managing startup sequence, brownout detection (via VDIV/RESET), and thermal safety. Use Value: MODE-pin sequencing ensures CPU powers before memory; PGOOD enables system reset controller; 160°C thermal cutoff protects against enclosure overheating. |
| Surveillance Camera System | POS Terminal Mainboard |
|
Use Scenario: Delivers 1.2-V image sensor core, 2.8-V ISP, and 3.3-V video encoder rails from a 9-V PoE-powered input. IC Role / Device Role / Timing Role: High-efficiency triple converter with FCCM minimizing EMI coupling into analog video signal path. Use Value: 250–2000 kHz frequency adjustability allows optimizing for lowest noise near CMOS sensor; 0.6-V reference enables accurate 1.2-V core regulation. |
Use Scenario: Powers ARM-based payment processor, display driver, and contactless reader ICs in compact countertop POS terminals using 12-V DC input. IC Role / Device Role / Timing Role: Central power management IC with independent EN pins enabling software-controlled rail enable/disable for peripheral power gating. Use Value: Dedicated SS pins allow programmable soft-start times per rail to prevent inrush current tripping upstream fuses; 3-A Buck1 handles peak processor loads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-buck DC/DC converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65261RHBR | Uses Pulse Skipping Mode (PSM) at light load instead of FCCM; identical pinout, package, and electrical specs otherwise. | Better light-load efficiency (≥85% at 10-mA load) but introduces low-frequency switching noise unsuitable for RF-sensitive designs. | Select TPS65261RHBR only if ultra-low standby power is critical and EMI filtering can accommodate PSM artifacts. |
| TPS65270RGET | Higher input range (4.5–32 V), 3-A/3-A/2-A outputs, integrated LDOs, but no VDIV power-fail detection or MODE sequencing. | Targeted at industrial 24-V systems; lacks dedicated RESET and automatic sequencing logic required for consumer DTV/gateway use cases. | Choose TPS65270RGET for wider VIN or added LDOs; avoid when VDIV-based brownout signaling or staggered startup is mandatory. |
Compared with TPS65261RHBR and TPS65270RGET, the TPS65261-1RHBR uniquely balances FCCM noise suppression, integrated power-fail detection, and automatic sequencing-making it optimal for consumer-grade connected devices where EMI compliance and reliable cold/warm boot behavior are non-negotiable.
Availability
TPS65261-1RHBR is available at Aetrix Electronics and suitable for set-top box, home gateway, and surveillance camera applications requiring stable component supply, long-term lifecycle support, and traceable sourcing from authorized channels.
Supply support for TPS65261-1RHBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability DC/DC conversion solutions.
The TPS6526x family was designed specifically for multi-rail consumer electronics power delivery-emphasizing integration, sequencing control, and FCCM/PSM mode flexibility to simplify design of DTV, gateway, and networking equipment.
FAQ
What is the key functional difference between TPS65261-1RHBR and TPS65261RHBR?
The TPS65261-1RHBR operates in Forced Continuous Conduction Mode (FCCM) at light loads, eliminating low-frequency switching noise and ensuring stable regulation under dynamic conditions. In contrast, the TPS65261RHBR uses Pulse Skipping Mode (PSM), which improves light-load efficiency but introduces variable-frequency artifacts that may interfere with RF or audio circuits. Both share identical pinout, package, and full-load specifications.
Does TPS65261-1RHBR support power sequencing across its three buck channels?
Yes, the TPS65261-1RHBR supports automatic power-up and power-down sequencing when the MODE pin is pulled high. This configures the device to stagger startup and shutdown of Buck1, Buck2, and Buck3 with a fixed 1024-cycle delay between channels, ensuring proper SoC or FPGA rail ordering without external controllers.
What is the purpose of the VDIV pin on the TPS65261-1RHBR?
The VDIV pin on the TPS65261-1RHBR serves as an input for power-fail detection. When connected to a resistor divider from the main input bus, it triggers the open-drain RESET signal when the input voltage falls below its 1.23-V threshold. This provides early brownout warning to system controllers before the buck regulators drop out of regulation.
Can TPS65261-1RHBR start up into a pre-biased output?
Yes, the TPS65261-1RHBR supports monotonic startup into pre-biased outputs. Its architecture prevents reverse current flow during initial ramp-up, making it suitable for hot-swap or modular systems where downstream circuitry may retain residual voltage on output rails prior to power application.
What thermal performance metrics are specified for TPS65261-1RHBR in the RHB package?
The TPS65261-1RHBR in the 5-mm × 5-mm VQFN-32 (RHB) package has a junction-to-ambient thermal resistance (RθJA) of 31.6°C/W under standard JEDEC PCB conditions, and a junction-to-board resistance (RθJB) of 6.1°C/W. The exposed thermal pad must be soldered to a solid copper pour for optimal heat dissipation and to maintain safe operation at full 3-A/2-A/2-A load.
TPS65261-1RHBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 18V
- Current - Output:
- 3A, 2A
- Frequency - Switching:
- 250kHz ~ 2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (5x5)
TPS65261-1RHBR FAQ
1.How can I place an order for TPS65261-1RHBR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65261-1RHBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65261-1RHBR reliable?
The price and inventory of TPS65261-1RHBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65261-1RHBR is usually 5 days.
3.What payment methods are accepted for TPS65261-1RHBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65261-1RHBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65261-1RHBR?
TPS65261-1RHBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65261-1RHBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65261-1RHBR?
For technical support, including TPS65261-1RHBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65261-1RHBR requirements.
6.How does Aetrix verify that TPS65261-1RHBR is sourced from the original manufacturer or authorized distributors?
All TPS65261-1RHBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65261-1RHBR meets industry standards.
7.What is the process for return or replacement of TPS65261-1RHBR?
All TPS65261-1RHBR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65261-1RHBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65261-1RHBR part is unused and in its original packaging.
Return procedure for TPS65261-1RHBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS65261-1RHBR Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

