Texas Instruments TPS65265RHBR
- Part No.:
- TPS65265RHBR
- Manufacturer:
- Texas Instruments
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS65265RHBR.pdf
- Description:
- IC REG BUCK ADJ TRPL 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,539
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Product details
Overview
TPS65265RHBR from Texas Instruments is a triple synchronous step-down DC-DC converter IC supporting 4.5 V to 17 V input, delivering independent 5-A/3-A/2-A output currents per channel, with 0.6 V ±1.33% feedback reference and adjustable 250 kHz–2.3 MHz switching frequency - used in multi-rail power systems for DTV and surveillance equipment.
For engineers reviewing the TPS65265RHBR datasheet, TPS65265RHBR pinout, TPS65265RHBR application, or TPS65265RHBR equivalent, key selection criteria include phase-interleaved operation (120°), dedicated enable/soft-start pins per buck, PSM/FCCM mode control via MODE/PSM pins, and thermal shutdown at 160°C with 20°C hysteresis.
Technical Context
The TPS65265RHBR implements constant-frequency peak-current-mode control across three independent buck regulators, each with dedicated FB, COMP, EN, BST, LX, and PGND terminals. Its 120° out-of-phase clocking reduces input ripple and eases filter design while maintaining synchronized soft-start sequencing.
It integrates an internal 6.1 V LDO (V7V) for gate driver bias, supports external frequency programming via ROSC, and provides programmable power-good delay (PG_DLY) and sequence delay (SEQ_DLY) using external capacitors - all within a single 32-pin QFN package with exposed thermal pad.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 17 V - supports common intermediate bus rails (5 V, 9 V, 12 V, 15 V) without external pre-regulation. |
| Output Currents | 5 A / 3 A / 2 A - channel-specific current capability enables asymmetric rail generation for SoC core/I/O/memory supplies. |
| Feedback Reference | 0.6 V ±1.33% - tight tolerance enables accurate output regulation down to sub-1 V with standard resistor dividers. |
| Switching Frequency | 250 kHz to 2.3 MHz - externally adjustable via ROSC resistor; higher frequencies reduce inductor size, lower frequencies improve light-load efficiency. |
| Thermal Shutdown | 160°C trip with 20°C hysteresis - protects against sustained overload or poor PCB thermal design; auto-recovery after cooldown. |
| Power Modes | Pulse Skipping Mode (PSM) when PSM pin floats/high; Forced Continuous Conduction Mode (FCCM) when PSM = GND - selectable noise vs. efficiency trade-off. |
| Phase Relationship | 120° out-of-phase between Buck1/Buck2/Buck3 - cuts RMS input ripple by ~58%, reducing required input capacitance and EMI filtering. |
Pinout & Package
TPS65265RHBR is housed in a 32-pin thermally enhanced QFN (RHB) package measuring 5.0 mm × 5.0 mm with an exposed thermal pad requiring solder connection to PCB ground plane for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN / PVIN1–PVIN3 | Independent input power rails | Three separate input pins allow different source voltages or localized decoupling per buck channel. |
| LX1–LX3 | Switch node outputs | High-slew-rate switching nodes connecting to external inductors; require low-inductance layout to minimize ringing. |
| FB1–FB3 | Feedback sensing inputs | Kelvin-connected voltage sense points enabling accurate regulation despite PCB trace resistance. |
| EN1–EN3 | Individual enable controls | Each buck can be independently enabled/disabled; floating = active; supports UVLO adjustment via resistor divider. |
| MODE | Sequencing control | Configures automatic power-up/down sequence (when tied high/GND) or independent control (when floating). |
| PGOOD | Open-drain system status | Asserts high only when all three outputs are in regulation and sequencing complete - used for downstream power enable. |
| PG_DLY / SEQ_DLY | Capacitor-programmable delays | External capacitors set PGOOD assertion delay and inter-buck sequencing interval - no external logic required. |
| BST1–BST3 | Bootstrap supply terminals | Connect 47 nF capacitor from BSTx to corresponding LXx to generate gate drive voltage for integrated high-side MOSFETs. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent buck regulators | Enables compact, integrated multi-rail power solution - eliminates need for three discrete converters and associated control logic. |
| 120° interleaved switching | Reduces input capacitor RMS current by >50%, allowing smaller ceramic input caps and lower EMI emissions. |
| Dedicated soft-start per channel | Fixed 2.4 ms soft-start time prevents inrush current on individual rails - critical for hot-plug or pre-biased load applications. |
| Integrated V7V LDO | 6.1 V internal LDO powers gate drivers and internal circuitry - removes need for external bias supply and improves startup reliability. |
| Programmable PGOOD delay | Capacitor-set delay ensures downstream circuits only power up after stable, sequenced rail establishment - avoids latch-up or brownout. |
Applications
| DTV Power Management | Set-Top Box Multi-Rail Supply |
|---|---|
Use Scenario: Powering SoC, memory, and interface ICs in digital television platforms requiring clean, sequenced 1.2 V, 1.5 V, and 3.3 V rails. IC Role / Device Role / Timing Role: Primary triple-output PMIC delivering regulated core, I/O, and peripheral voltages with monotonic startup into pre-biased loads. Use Value: Eliminates discrete buck controllers and sequencing ICs; 120° phase shift minimizes bulk capacitor count and board area. |
Use Scenario: Supporting ARM-based media processors in OTT streaming devices needing independent voltage scaling and fault isolation per subsystem. IC Role / Device Role / Timing Role: Central power management IC providing dynamic enable/disable of processor cores, DDR, and HDMI PHY rails via EN1–EN3. Use Value: PSM mode delivers >90% efficiency at 10 mA load; FCCM mode ensures low-noise operation during video decode bursts. |
| Home Gateway Router | IP Surveillance Camera |
Use Scenario: Generating 1.0 V (CPU), 1.8 V (DDR), and 3.3 V (PHY) from 12 V adapter in residential broadband gateways. IC Role / Device Role / Timing Role: Triple buck converter with programmable SEQ_DLY ensuring CPU powers before memory and PHY - preventing boot failure. Use Value: Integrated thermal protection and overcurrent limiting prevent field failures under sustained 85°C ambient conditions. |
Use Scenario: Powering image sensor, ISP, and wireless module in outdoor IP cameras operating from 12 V PoE or battery backup. IC Role / Device Role / Timing Role: High-efficiency PMIC supplying 1.2 V (sensor core), 1.8 V (ISP), and 3.3 V (Wi-Fi) with PGOOD monitoring all rails. Use Value: 160°C thermal shutdown with 20°C hysteresis sustains operation during extended summer exposure without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65261RSLR | 3-A/2-A/2-A outputs; includes open-drain RESET for input power failure detection; no V7V LDO. | Preferred where input rail monitoring is required; lacks integrated gate driver bias, requiring external 6-V supply. | Choose for systems needing input UVLO alerting but tolerating lower output current on Buck2/Buck3. |
| TPS65263RSLR | 3-A/2-A/2-A outputs; adds I²C interface for dynamic voltage scaling and telemetry; same RHB package. | Suitable for adaptive power systems (e.g., CPU DVFS); requires firmware support and I²C routing - increases BOM and layout complexity. | Choose when real-time rail reconfiguration or telemetry is needed; not drop-in due to control interface change. |
Compared with TPS65265RHBR, TPS65261RSLR offers input fault signaling at lower current capability, while TPS65263RSLR adds programmability at the cost of software integration - neither matches the 5-A/3-A/2-A asymmetry and integrated V7V LDO of TPS65265RHBR for high-current, self-contained multi-rail designs.
Availability
TPS65265RHBR is available at Aetrix Electronics and suitable for DTV, surveillance, and home gateway applications requiring stable component supply, long-term industrial availability, and consistent parametric performance across temperature.
Supply support for TPS65265RHBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and high-volume manufacturing.
The TPS65265RHBR belongs to TI's high-density multi-output PMIC product line, engineered specifically for space-constrained consumer and industrial applications demanding reliable, integrated, and thermally robust DC-DC conversion.
FAQ
What input voltage range does the TPS65265RHBR support?
The TPS65265RHBR supports an input voltage range of 4.5 V to 17 V, covering standard intermediate bus voltages including 5 V, 9 V, 12 V, and 15 V. This wide range allows direct operation from common wall adapters, PoE injectors, or battery packs without pre-regulation - making it ideal for TPS65265RHBR-based DTV and gateway power designs.
How does the TPS65265RHBR manage power sequencing between its three buck channels?
The TPS65265RHBR supports both independent and automatic sequencing modes. When the MODE pin is tied high or low, it activates an internal state machine that sequences Buck1 → Buck2 → Buck3 with user-programmable delays via the SEQ_DLY capacitor. In floating MODE, each buck is controlled separately by its ENx pin - giving full flexibility for TPS65265RHBR implementations requiring custom startup timing.
What is the function of the V7V pin on the TPS65265RHBR?
The V7V pin on the TPS65265RHBR is the output of an internal LDO that supplies ~6.1 V to power the gate drivers and internal control circuitry. It requires a 10-µF capacitor to ground for stability and eliminates the need for an external bias supply - simplifying layout and improving reliability in TPS65265RHBR-based power systems.
Can the TPS65265RHBR operate into a pre-biased output load?
Yes, the TPS65265RHBR is designed for safe monotonic startup into pre-biased loads. Its peak-current-mode architecture and controlled soft-start (2.4 ms fixed per buck) prevent reverse current flow and output voltage overshoot - a critical feature for TPS65265RHBR use in hot-pluggable modules or systems with persistent backup rails.
What protection features are integrated into the TPS65265RHBR?
The TPS65265RHBR integrates thermal shutdown (160°C trip, 20°C hysteresis), cycle-by-cycle overcurrent protection with hiccup mode (256-cycle wait, 8192-cycle restart), input UVLO (3.8 V rising threshold), and PGOOD supervision with hysteresis. These features ensure robust operation in unattended TPS65265RHBR deployments such as outdoor surveillance or network infrastructure.
TPS65265RHBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 3
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 17V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 17V
- Current - Output:
- 5A, 3A, 2A
- Frequency - Switching:
- 250kHz ~ 2.3MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (5x5)
TPS65265RHBR FAQ
1.How can I place an order for TPS65265RHBR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65265RHBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65265RHBR reliable?
The price and inventory of TPS65265RHBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65265RHBR is usually 5 days.
3.What payment methods are accepted for TPS65265RHBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65265RHBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65265RHBR?
TPS65265RHBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65265RHBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65265RHBR?
For technical support, including TPS65265RHBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65265RHBR requirements.
6.How does Aetrix verify that TPS65265RHBR is sourced from the original manufacturer or authorized distributors?
All TPS65265RHBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65265RHBR meets industry standards.
7.What is the process for return or replacement of TPS65265RHBR?
All TPS65265RHBR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65265RHBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65265RHBR part is unused and in its original packaging.
Return procedure for TPS65265RHBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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