Texas Instruments TPS65270RGET
- Part No.:
- TPS65270RGET
- Manufacturer:
- Texas Instruments
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65270RGET.pdf
- Description:
- IC REG BUCK ADJ 2A/3A DL 24VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:444
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Product details
Overview
TPS65270RGET from Texas Instruments is a dual synchronous step-down DC-DC regulator IC integrating two independent buck converters for power management in multi-rail systems. It supports 4.5 V to 18 V input, delivers up to 2 A on Buck 1 and 3 A on Buck 2, features 0.8 V ±1% reference accuracy, 300 kHz–1.4 MHz programmable switching frequency, and 180° out-of-phase operation to reduce input ripple-used in set-top boxes, DSL modems, and home gateways.
For engineers reviewing the TPS65270RGET datasheet, TPS65270RGET pinout, TPS65270RGET application, or TPS65270RGET equivalent, key selection considerations include per-channel enable/soft-start control, peak current-mode architecture with external compensation, thermal shutdown (160°C trip), and compatibility with 4-mm × 4-mm VQFN-24 packaging for high-density PCB layouts.
Technical Context
The TPS65270RGET implements constant-frequency peak current-mode control per channel, enabling fast transient response and simplified Type II loop compensation via COMP1/COMP2 pins. Each converter integrates high-side and low-side MOSFETs (Rdson_HS1 = 120 mΩ, Rdson_LS2 = 50 mΩ) and supports prebiased startup, cycle-by-cycle overcurrent protection, and hiccup-mode fault recovery.
It operates in either forced PWM (LOW_P = low) or pulse-skipping mode (LOW_P = high) for light-load efficiency optimization. Switching frequency is resistor-programmed via ROSC (250 kΩ → ~1 MHz), and 180° phase shift between LX1/LX2 reduces RMS input capacitor current by up to 30% versus in-phase operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 18 V - supports 5 V, 9 V, 12 V, and 15 V bus supplies and battery chemistries without external LDO pre-regulation. |
| Output Current Capability | Buck 1: 2 A continuous; Buck 2: 3 A continuous - enables dual-rail supply for SoC core + I/O or processor + memory subsystems. |
| Reference Voltage Accuracy | 0.8 V ±1% at TJ = 25°C; ±2% over –40°C to 125°C - ensures tight output regulation across temperature for sensitive digital loads. |
| Switching Frequency Range | 300 kHz to 1.4 MHz - adjustable via ROSC-to-GND resistor; 625 kHz typical for balanced EMI and efficiency in 12 V input applications. |
| Thermal Protection | 160°C trip with 20°C hysteresis - disables switching until junction cools to 140°C, preventing permanent damage during sustained overload or poor heatsinking. |
| Quiescent Current | 1 mA non-switching (LOW_P = high); 10 µA shutdown - minimizes standby power in always-on network equipment. |
| Package Thermal Resistance | RθJA = 33.8°C/W (VQFN-24) - enables >2 W dissipation at ΔT = 68°C ambient rise, supporting full-load operation without forced air. |
Pinout & Package
The TPS65270RGET is housed in a 4-mm × 4-mm, 24-pin thermally enhanced VQFN (RGE) package with an exposed thermal pad requiring solder connection to PCB ground plane for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1 / EN2 | Dedicated enable inputs | Logic-high (>1.55 V) activates respective buck channel; internal 1-MΩ pullup allows auto-enable if left floating; supports independent power sequencing. |
| FB1 / FB2 | Feedback voltage inputs | Monitor output voltage via resistor divider; regulate to 0.8 V reference - sets VOUT1 = 0.8 × (1 + R1/R2) with 1% resistors. |
| SS1 / SS2 | Soft-start timing inputs | 5-µA internal current source charges external capacitor; 4.7 nF yields ~800 µs soft-start - limits inrush current during power-up. |
| BST1 / BST2 | Bootstrap supplies | Drive high-side MOSFET gates; require 47-nF ceramic capacitor from BSTx to corresponding LXx node for proper gate drive voltage. |
| COMP1 / COMP2 | Loop compensation outputs | Connect Type II network (series RC to GND) to stabilize control loop; transconductance = 130 µA/V enables wide bandwidth design. |
| ROSC | Oscillator frequency set | Resistor to GND programs fSW; 250 kΩ yields ~1 MHz - balances switching loss, inductor size, and EMI filtering requirements. |
| LOW_P | Low-power mode control | High = PSM mode for light-load efficiency; low = forced PWM for fixed-frequency noise control - cannot be left floating. |
| VIN1 / VIN2 | Independent input supplies | Accept separate input rails (e.g., 12 V for Buck 1, 5 V for Buck 2); each requires local 10-µF ceramic decoupling. |
| LX1 / LX2 | Switching nodes | Connect to external inductors (e.g., 4.7 µH); high di/dt paths requiring short, low-inductance layout to minimize EMI and voltage spikes. |
| VCC | Internal bias supply | 6.5-V LDO output; requires 10-µF ceramic capacitor to GND - powers internal circuitry and can supply auxiliary loads during standby. |
| AGND / GND | Analog and power grounds | Must be connected together and to thermal pad; AGND ties error amplifier and reference; GND returns high-current paths (LX, BST). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual-buck topology | Eliminates need for two discrete regulators - reduces BOM count, board area, and design complexity for dual-output power rails. |
| 180° out-of-phase operation | Reduces RMS input capacitor current by ~30%, allowing smaller input bulk capacitors and lower EMI filter cost. |
| Prebiased output startup | Enables safe turn-on when output is already biased (e.g., hot-swap or rail-sharing systems) without reverse current or latch-up risk. |
| Dedicated per-channel soft-start | Independent SS1/SS2 pins allow staggered ramp-up of multiple rails - prevents simultaneous inrush current peaks during system boot. |
| Cycle-by-cycle overcurrent protection | Detects peak inductor current exceeding ILIMIT1 (3.2 A) or ILIMIT2 (4.1 A); shuts down within one cycle to protect MOSFETs and inductors. |
Applications
| DTV Power Management | DSL/Cable Modem Power |
|---|---|
Use Scenario: Dual-rail supply for digital TV mainboard requiring 1.2 V @ 3 A (SoC core) and 1.8 V @ 2 A (memory interface). IC Role / Device Role / Timing Role: Primary DC-DC regulator providing tightly regulated, sequenced, low-noise power to SoC and DDR memory subsystems. Use Value: Integrated dual-buck architecture eliminates discrete regulator duplication; 180° phase shift cuts input capacitor size by 40% versus in-phase design. | Use Scenario: Power conversion in broadband access equipment with 12 V input, generating 3.3 V @ 2 A (PHY) and 5 V @ 3 A (processor). IC Role / Device Role / Timing Role: Central power management IC delivering isolated, independently enabled rails for analog front-end and digital baseband processing. Use Value: Per-channel EN/SS pins enable precise power sequencing per TR-143 compliance; PSM mode extends standby time in always-on CPE devices. |
| Home Gateway Networking | Car DVD Player Supply |
Use Scenario: Multi-protocol router (Wi-Fi 6 + Ethernet + USB) needing 1.1 V @ 2 A (CPU), 1.8 V @ 2 A (RAM), and 3.3 V @ 1 A (PHY). IC Role / Device Role / Timing Role: Dual-buck controller managing primary SoC rails; third rail derived from VCC LDO or secondary stage. Use Value: 0.8 V ±1% reference ensures stable CPU voltage under dynamic load; thermal shutdown protects against enclosure overheating in sealed enclosures. | Use Scenario: Automotive infotainment head unit powered from 9–16 V battery, requiring 1.2 V @ 2 A (DSP) and 3.3 V @ 3 A (display controller). IC Role / Device Role / Timing Role: High-input-voltage dual buck regulator handling automotive transients and cold-crank conditions down to 4.5 V. Use Value: UVLO threshold (4.2 V typ.) ensures reliable start-up during engine cranking; integrated MOSFETs eliminate external FET layout sensitivity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54290RGER | Single-channel, 2-A output; no second buck; higher max fSW (2.2 MHz); no LOW_P pin or PSM mode. | Suitable only for single-rail designs; lacks independent sequencing and light-load efficiency optimization. | Select when only one regulated rail is needed and higher switching frequency is preferred for ultra-small inductors. |
| LM27342SDX/NOPB | Single-channel, 2-A; requires external MOSFETs; no integrated bootstrap or VCC LDO; 200 kHz–2 MHz fSW. | Higher BOM count and layout complexity; no dual-channel integration or thermal pad; lower integration level. | Choose for cost-sensitive, lower-volume designs where external FET selection offers flexibility in Rdson/Qg trade-offs. |
Compared with TPS54290RGER and LM27342SDX/NOPB, the TPS65270RGET uniquely delivers dual independent buck regulation with integrated MOSFETs, per-channel enable/soft-start, and PSM mode-making it the only option among the three that satisfies multi-rail, space-constrained, and low-standby-power requirements simultaneously.
Availability
TPS65270RGET is available at Aetrix Electronics and suitable for DTV, home gateway, and automotive infotainment applications requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS65270RGET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in high-reliability, high-efficiency power solutions.
The TPS65270 belongs to TI's dual-output synchronous buck regulator product line, designed specifically for space-constrained, multi-rail consumer and networking equipment where integration, thermal performance, and light-load efficiency are critical.
FAQ
What is the maximum allowable input voltage for the TPS65270RGET?
The TPS65270RGET supports an absolute maximum input voltage of 20 V on VIN1 and VIN2 pins, with recommended operating range from 4.5 V to 18 V. Transient withstand capability is rated at 23 V (<10 ns) on LX1/LX2 nodes. Exceeding 20 V continuously risks permanent damage per Absolute Maximum Ratings.
How does the LOW_P pin affect operation of the TPS65270RGET?
The LOW_P pin controls light-load behavior: logic high enables pulse-skipping mode (PSM) for high efficiency at <10% load, while logic low forces constant-frequency PWM operation for predictable EMI and minimal output voltage ripple. The pin must be actively driven - it cannot be left floating due to undefined state risk.
Can the TPS65270RGET start up with a prebiased output voltage?
Yes, the TPS65270RGET supports prebiased startup: when the output voltage is already present at FB1/FB2 before enable, the device begins switching only after the internal soft-start ramp reaches that prebiased level - preventing reverse current flow and ensuring controlled turn-on in hot-swap or rail-sharing systems.
What thermal management is required for the TPS65270RGET in full-load operation?
The TPS65270RGET requires soldering its exposed thermal pad to a PCB copper plane with ≥4 thermal vias (0.3 mm diameter) to an inner ground layer. With RθJA = 33.8°C/W, full 2-A/3-A load at 12 V input generates ~2.1 W dissipation; maintaining junction temperature ≤125°C requires ≤68°C ambient rise - achievable with 2-in² 2-oz copper area and no forced airflow.
Is the TPS65270RGET pin-compatible with other packages of the same part number?
No - the TPS65270RGET (VQFN-24, 4 mm × 4 mm) has different pin mapping than the HTSSOP-24 (PWP) variant. While both share identical electrical functionality and parameter specs, pin assignments differ significantly (e.g., EN1 is pin 1 in PWP but pin 16 in RGE), requiring separate PCB layouts for each package.
TPS65270RGET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 15V
- Current - Output:
- 2A, 3A
- Frequency - Switching:
- 300kHz ~ 1.4MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65270RGET FAQ
1.How can I place an order for TPS65270RGET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65270RGET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65270RGET reliable?
The price and inventory of TPS65270RGET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65270RGET is usually 5 days.
3.What payment methods are accepted for TPS65270RGET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65270RGET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65270RGET?
TPS65270RGET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65270RGET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65270RGET?
For technical support, including TPS65270RGET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65270RGET requirements.
6.How does Aetrix verify that TPS65270RGET is sourced from the original manufacturer or authorized distributors?
All TPS65270RGET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65270RGET meets industry standards.
7.What is the process for return or replacement of TPS65270RGET?
All TPS65270RGET units undergo pre-shipment inspection (PSI). If there is an issue with TPS65270RGET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65270RGET part is unused and in its original packaging.
Return procedure for TPS65270RGET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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