Texas Instruments TPS65632RTER

Overview

TPS65632 from Texas Instruments is a triple-output AMOLED display power supply IC integrating two boost converters (VPOS, AVDD) and one inverting buck-boost converter (VNEG). It delivers 4.6 V / 300 mA (VPOS), ±4.0 V / 300 mA (VNEG), and 7.7 V / 30 mA (AVDD) from a 2.9–4.5 V input, supporting smartphone and portable display systems with tight regulation and digital programmability.

For engineers reviewing the TPS65632 datasheet, TPS65632 pinout, TPS65632 application, or TPS65632 equivalent, key selection considerations include its triple-rail output architecture, ±4.0 V default VNEG with 6-bit digital programming via CTRL, SELP2-selectable AVDD (5.8 V / 7.7 V), and WQFN-16 package with thermal pad for high-density AMOLED biasing.

Technical Context

The TPS65632 employs three independent switching regulators: a fixed 4.6 V current-mode boost (VPOS), a constant-off-time inverting buck-boost (VNEG) with programmable output from –1.4 V to –5.4 V, and a second current-mode boost (AVDD) with dual fixed outputs selected by SELP2. All operate at 1.7 MHz switching frequency.

Its digital interface uses rising-edge counting on CTRL to set VNEG voltage in discrete steps (e.g., 0 edges = –4.0 V, 3 edges = –5.2 V); CT pin capacitor controls transition time between programmed levels. Short-circuit protection latches on VPOS < 4.1 V for >3 ms or VNEG overvoltage >500 mV for >3 ms.

Key Specifications

Pinout & Package

TPS65632 is housed in a 3.00 mm × 3.00 mm, 16-pin WQFN package with exposed thermal pad (RTE variant). The pad must be soldered to AGND, PGND1, and PGND2 for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-output AMOLED power supply applications.

Compared with TPS65631RTER and MAX17104ETL+, the TPS65632 offers the widest VNEG programming range (–1.4 V to –5.4 V) and hardware-selectable AVDD in the smallest 3×3 mm WQFN package - making it optimal for next-generation compact AMOLED systems requiring maximum bias flexibility and minimal board area.

Availability

TPS65632 is available at Aetrix Electronics and suitable for smartphone display modules, wearable micro-OLED systems, and portable medical imaging devices requiring stable component supply and long-term production continuity.

Supply support for TPS65632 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power conversion solutions.

The TPS65632 belongs to TI's AMOLED display power management product line, designed specifically to replace multi-IC bias solutions in space-constrained portable displays while delivering factory-trimmed accuracy and digital programmability.

FAQ

What is the default VNEG output voltage of the TPS65632, and how is it programmed?

The TPS65632 defaults to –4.0 V on VNEG at power-up when CTRL is pulled high. Programming is achieved by applying rising-edge pulses to the CTRL pin: each pulse increments a 6-bit DAC counter, selecting one of 42 discrete output voltages from –1.4 V to –5.4 V per TI datasheet Table 1. No external components or I²C interface are needed - the TPS65632 implements this entirely with internal logic and DAC. The TPS65632 retains the last programmed value until reset or power cycle.

Can the TPS65632 generate both 5.8 V and 7.7 V on AVDD simultaneously?

No, the TPS65632 generates only one AVDD voltage at a time, selected by the SELP2 pin state: low (or floating) selects 7.7 V, high selects 5.8 V. Both outputs are factory-trimmed and mutually exclusive - the TPS65632 does not support concurrent dual AVDD rails. This hardware-selectable feature simplifies design versus solutions requiring external switching or multiple regulators, and ensures optimal efficiency for the chosen display driver IC voltage requirement.

How does the CT pin affect VNEG voltage transitions in the TPS65632?

The CT pin on the TPS65632 sets the slew rate for VNEG output transitions using an external capacitor to ground. The internal CT pin resistance (300 kΩ typical) forms an RC time constant: τ = R_CT × C_CT. For example, a 100 nF capacitor yields τ ≈ 30 ms, meaning VNEG reaches ~70% of its new target voltage after 30 ms and settles fully after ~90 ms. Leaving CT open or grounded minimizes transition time. This controlled ramp prevents display artifacts during dynamic bias reconfiguration - a key capability of the TPS65632 not found in fixed-output alternatives.

What is the purpose of the FBS pin on the TPS65632, and what happens if it is left unconnected?

The FBS pin on the TPS65632 is a dedicated feedback sense input for the VPOS boost converter, enabling Kelvin sensing to compensate for PCB trace resistance between the IC and output capacitor. When FBS is connected directly to the OUTP1 capacitor's positive terminal, VPOS accuracy improves to ±0.5% across temperature and load. If FBS is left floating or tied to AGND, the TPS65632 reverts to sensing VPOS at the OUTP1 pin itself - resulting in reduced accuracy (±1.3%) due to IR drop. This fallback mode maintains functionality but trades precision for simplicity in cost-sensitive designs.

Does the TPS65632 support independent enable control for all three outputs?

The TPS65632 provides partial independent enable control: EN pin enables/disables only the AVDD boost converter (OUTP2), while CTRL pin enables/disables both VPOS and VNEG converters (OUTP1 and OUTN). There is no individual enable for VPOS or VNEG alone. This architecture supports phased startup - e.g., enabling AVDD first via EN, then VPOS/VNEG via CTRL - reducing inrush current and allowing system-level sequencing. The TPS65632 does not support disabling VPOS while keeping VNEG active, or vice versa, as they share the same enable path.