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Texas Instruments TPS720115DRVR
- Part No.:
- TPS720115DRVR
- Manufacturer:
- Texas Instruments
- Package:
- 6-WDFN Exposed Pad
- Datasheet:
-
TPS720115DRVR.pdf
- Description:
- IC REG LINEAR 1.15V 350MA 6WSON
- Quantity:
- Payment:
- Shipping:
Inventory:3,660
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Product details
Overview
TPS720115DRVR from Texas Instruments is a 350 mA ultra-low VIN, RF-optimized low-dropout linear regulator with dual-rail bias architecture. It delivers 1.15 V output at ±2% accuracy over –40°C to 125°C, features 110 mV dropout at full load, 48 μVRMS output noise (10 Hz–100 kHz), and supports light-load regulation with IN pin floating - enabling power-saving modes in portable RF systems such as cellular camera modules.
For engineers reviewing the TPS720115DRVR datasheet, TPS720115DRVR pinout, TPS720115DRVR application, or TPS720115DRVR equivalent, key selection criteria include its dual-rail (VIN/VBIAS) operation, 38 μA quiescent current, 140 μs startup time, 80 dB VIN PSRR at 10 kHz, and compatibility with 2.2 μF ceramic output capacitors in space-constrained DSBGA-5 packaging.
Technical Context
The TPS720115DRVR employs an NMOS pass transistor with separate VIN and VBIAS rails: VIN supplies the main power path (as low as VOUT + 0.5 V), while VBIAS (≥2.5 V or VOUT + 1.4 V) powers the control circuitry. This architecture enables high efficiency in low-VOUT applications where VIN is derived from a high-efficiency DC-DC converter.
It integrates undervoltage lockout (UVLO) on the BIAS pin (2.41–2.49 V threshold), thermal shutdown (160°C trip), overcurrent protection, monotonic soft-start (100 mA + ILOAD inrush limit), and maintains regulation under ≤500 μA load even when VIN is floating - a feature critical for standby-mode retention in microcontroller-based wireless subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 1.15 V ±2% over load, line, temperature (–40°C to 125°C); factory-programmed via EEPROM |
| Max Output Current | 350 mA continuous; internal current limit 420–800 mA ensures robust fault handling |
| Dropout Voltage | 110 mV at 350 mA (VIN = VOUT + 0.1 V, VBIAS = VOUT + 1.4 V); enables operation with minimal headroom |
| Quiescent Current | 38 μA typical; enables battery-powered operation with multi-day standby life |
| Output Noise | 48 μVRMS (10 Hz–100 kHz); suitable for noise-sensitive RF analog circuits (e.g., VCOs, ADCs) |
| PSRR | 80 dB at 10 kHz (VIN-referred); 70 dB at 100 kHz (VBIAS-referred); suppresses switching noise from upstream DC-DC converters |
| Startup Time | 140 μs to 95% of VOUT; supports fast wake-up in duty-cycled wireless systems |
Pinout & Package
TPS720115DRVR is packaged in a 1.36 mm × 0.96 mm DSBGA-5 (YZU) package with bottom-side solder balls. The thermal pad is not electrically connected and requires no external connection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT (A3) | Regulated output | Delivers 1.15 V to load; requires 2.2 μF ceramic capacitor to GND for stability and transient response |
| NC (-) | No connection | Unbonded die pad; must remain unconnected on PCB |
| EN (C3) | Enable input | Active-high logic control (1.1 V min high, 0.4 V max low); connects to microcontroller GPIO for power sequencing |
| BIAS (C1) | Bias supply input | Powers internal control circuitry; must be ≥2.5 V or VOUT + 1.4 V; bypassed with 0.1 μF capacitor |
| GND (B2) | Ground reference | Common return for IN, BIAS, OUT, and EN; ties to PCB ground plane for noise immunity |
| IN (A1) | Main input supply | Primary power path; accepts 1.1 V to 4.5 V; can float during light-load standby while BIAS sustains regulation |
Key Features
| Feature | Design Value |
|---|---|
| Dual-rail architecture (VIN + VBIAS) | Enables >20% efficiency gain vs single-rail LDOs when VIN is sourced from a DC-DC converter (e.g., TPS62xxx) |
| IN-pin floating light-load regulation | Maintains 1.15 V output with ≤500 μA load when VIN is disconnected - essential for MCU memory retention during deep sleep |
| Monotonic soft-start | Limits VIN inrush to 100 mA + ILOAD and caps VOUT overshoot to ≤3%, preventing system reset on power-up |
| Ultra-low noise & high PSRR | 48 μVRMS noise + 80 dB PSRR at 10 kHz enables direct powering of RF transceivers without additional filtering |
| Thermal & current protection | Integrated thermal shutdown (160°C) and current limiting (420–800 mA) prevent damage during short-circuit or overload events |
Applications
| Cellular Camera Module Power | Wireless LAN Baseband IC Supply |
|---|---|
|
Use Scenario: Powers image sensor and ISP core in smartphone rear cameras requiring stable 1.15 V under burst-mode loads. IC Role / Device Role / Timing Role: Primary LDO delivering regulated 1.15 V rail; handles 0→350 mA load steps in <1 μs with ±15 mV deviation. Use Value: Dual-rail architecture allows VIN to be fed from a shared 1.8 V DC-DC converter, reducing board area and improving system efficiency by 18% vs conventional LDOs. |
Use Scenario: Supplies baseband processor in Wi-Fi 5/6 client devices during active transmit/receive cycles. IC Role / Device Role / Timing Role: Low-noise 1.15 V source for analog front-end and clock generation circuits; rejects switching noise from adjacent PMIC rails. Use Value: 48 μVRMS noise and 80 dB PSRR at 10 kHz eliminate need for ferrite beads or LC filters, saving BOM cost and PCB space. |
| Handheld Medical Sensor Node | Industrial IoT Edge Controller Core Rail |
|
Use Scenario: Powers ultra-low-power MCU and analog sensor interface in battery-operated wearable ECG monitors. IC Role / Device Role / Timing Role: Always-on LDO maintaining 1.15 V during 99% deep-sleep duty cycle; draws only 38 μA quiescent current. Use Value: IN-pin floating capability enables MCU to retain RAM state while disabling upstream DC-DC, extending battery life by 3.2× vs always-on VIN topology. |
Use Scenario: Supplies FPGA configuration core voltage in ruggedized industrial gateways operating across –40°C to 105°C ambient. IC Role / Device Role / Timing Role: High-reliability 1.15 V regulator with guaranteed operation up to 125°C junction temperature and thermal shutdown protection. Use Value: ±2% output accuracy over full temperature range eliminates need for external calibration, reducing firmware complexity and test time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS72012DRVR | Fixed 1.2 V output (vs 1.15 V); identical pinout, package, and electrical specs otherwise | Suitable where system requires 1.2 V core rail instead of 1.15 V; no layout change needed | Select when 1.2 V matches SoC core voltage spec and tighter initial accuracy (±1% at 25°C) is prioritized |
| TPS79512DRVR | Single-rail (VIN-only) 1.2 V LDO; higher IQ (265 μA), no VBIAS pin, 170 mV dropout at 350 mA | Lacks IN-floating standby mode and dual-rail efficiency; simpler biasing but lower performance in RF apps | Choose only for cost-sensitive, non-RF applications where 1.2 V is acceptable and ultra-low noise/PSRR is not required |
Compared with TPS720115DRVR, TPS72012DRVR offers identical architecture with a 50 mV higher output voltage and marginally better room-temperature accuracy, while TPS79512DRVR sacrifices RF-grade noise/PSRR and standby efficiency for lower unit cost and design simplicity.
Availability
TPS720115DRVR is available at Aetrix Electronics and suitable for cellular camera modules, wireless LAN baseband supplies, handheld medical sensors, and industrial IoT edge controllers requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS720115DRVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in power management ICs for high-reliability applications.
The TPS720 family was designed specifically for RF-sensitive, battery-powered portable electronics - delivering ultra-low noise, dual-rail efficiency, and intelligent standby modes to extend battery life without compromising signal integrity.
FAQ
What is the minimum input voltage required for TPS720115DRVR to regulate at 1.15 V?
The TPS720115DRVR requires VIN ≥ VOUT + 0.5 V = 1.65 V under normal operation. However, it can maintain regulation with VIN floating if load ≤500 μA and VBIAS ≥2.5 V or VOUT + 1.4 V (i.e., ≥2.55 V). This dual-voltage flexibility is a defining feature of the TPS720115DRVR architecture.
Does TPS720115DRVR require an input capacitor on the IN pin?
No, the TPS720115DRVR does not require an input capacitor for stability. However, TI recommends a 0.1–1 μF low-ESR ceramic capacitor near the IN pin to improve transient response and reduce noise coupling - especially when the input source has high impedance or shares a rail with noisy switching converters feeding the TPS720115DRVR.
Can TPS720115DRVR be used with a 1.8 V input supply?
Yes - the TPS720115DRVR supports VIN up to 4.5 V, making 1.8 V a valid and commonly used input. When paired with a 1.8 V DC-DC converter (e.g., TPS62xxx), the TPS720115DRVR's dual-rail architecture achieves higher overall efficiency than single-rail LDOs, as VBIAS can be derived from a higher-voltage auxiliary rail (e.g., 3.3 V) while VIN remains at 1.8 V.
What is the purpose of the NC pin on TPS720115DRVR?
The NC (no-connect) pin on the TPS720115DRVR is an unbonded die pad with no internal connection. It must remain unconnected on the PCB layout - neither tied to GND nor left floating with traces. This mechanical placeholder ensures consistent DSBGA-5 package dimensions across the TPS720 family and avoids unintended parasitic coupling that could degrade RF performance in the TPS720115DRVR.
How does the enable pin (EN) behave during power sequencing?
The EN pin of the TPS720115DRVR is active-high with TTL/CMOS-compatible thresholds: device enables when EN ≥1.1 V and disables when EN ≤0.4 V. During sequencing, asserting EN after VIN and VBIAS are stable prevents inrush-related voltage droop. In shutdown, TPS720115DRVR draws only 0.5–2 μA, enabling precise power gating in multi-rail systems.
TPS720115DRVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 4.5V
- Voltage - Output (Min/Fixed):
- 1.15V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 350mA
- Current - Output:
- 350mA
- Current - Quiescent (Iq):
- 38 µA
- Current - Supply (Max):
- 80 µA
- PSRR:
- 85dB ~ 50dB (10Hz ~ 1MHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (2x2)
TPS720115DRVR FAQ
1.How can I place an order for TPS720115DRVR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS720115DRVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS720115DRVR reliable?
The price and inventory of TPS720115DRVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS720115DRVR is usually 5 days.
3.What payment methods are accepted for TPS720115DRVR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS720115DRVR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS720115DRVR?
TPS720115DRVR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS720115DRVR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS720115DRVR?
For technical support, including TPS720115DRVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS720115DRVR requirements.
6.How does Aetrix verify that TPS720115DRVR is sourced from the original manufacturer or authorized distributors?
All TPS720115DRVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS720115DRVR meets industry standards.
7.What is the process for return or replacement of TPS720115DRVR?
All TPS720115DRVR units undergo pre-shipment inspection (PSI). If there is an issue with TPS720115DRVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS720115DRVR part is unused and in its original packaging.
Return procedure for TPS720115DRVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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