Texas Instruments TPS72018YZUR

Overview

TPS72018YZUR from Texas Instruments is a 350 mA, ultra-low VIN, RF low-dropout linear regulator with dedicated BIAS pin for dual-rail operation. It delivers 1.8 V output at ±2% accuracy over –40°C to 125°C, features 110 mV dropout at full load, 48 μVRMS noise (10 Hz–100 kHz), and 80 dB VIN PSRR at 10 kHz - optimized for powering RF and analog circuitry in space-constrained portable devices.

For engineers reviewing the TPS72018YZUR datasheet, TPS72018YZUR pinout, TPS72018YZUR application, or TPS72018YZUR equivalent, this page provides verified package mapping (DSBGA-5), confirmed bias-supply architecture, validated light-load floating-IN regulation behavior, and real-world transient response metrics critical for battery-powered RF subsystems.

Technical Context

The TPS72018YZUR employs a dual-rail architecture: main power path through IN (as low as VOUT + 0.5 V) and control circuitry powered by BIAS (≥VOUT + 1.4 V or ≥2.5 V). Its BICMOS process enables 110 mV dropout at 350 mA while maintaining 38 μA quiescent current and monotonic 140 μs startup with 2.2 μF output capacitor.

It supports unique floating-IN operation: when IN is unconnected, the LDO regulates light loads (<500 μA) using only the BIAS rail, enabling power-saving modes where upstream DC-DC converters are disabled but core voltage must be maintained. UVLO on BIAS (2.41–2.49 V) and thermal shutdown (160°C) ensure robust fault handling.

Key Specifications

Pinout & Package

TPS72018YZUR uses a 1.33 mm × 0.96 mm DSBGA-5 package with bottom-side solder balls. Thermal performance relies on proper PCB pad layout per TI's SOLDERING REQUIREMENTS FOR MICROSTAR JUNIOR™ (DSBGA) guidelines.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS72018DRVR, the TPS72018YZUR offers superior board-area efficiency and lower thermal resistance to ambient in ultra-compact designs, while TPS79518DBVR trades RF performance and dual-rail flexibility for lower BOM count and cost in basic digital rail applications.

Availability

TPS72018YZUR is available at Aetrix Electronics and suitable for wireless camera modules, cellular baseband processors, Wi-Fi 6 RF front-ends, and industrial edge sensor nodes requiring stable component supply with guaranteed long-term availability.

Supply support for TPS72018YZUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in power management IC design and manufacturing.

The TPS720 family was engineered specifically for RF and portable applications demanding ultra-low noise, dual-rail efficiency, and sub-200 mV dropout - targeting camera, cellular, and wireless infrastructure markets where signal integrity and battery life are paramount.

FAQ

What is the minimum input voltage required for TPS72018YZUR to regulate 1.8 V output?

The TPS72018YZUR requires VIN ≥ VOUT + 0.5 V = 2.3 V under standard operation. However, its dual-rail architecture allows VIN as low as 1.1 V when BIAS ≥ VOUT + 1.4 V = 3.2 V, enabling use with ultra-low-voltage intermediate rails. This is explicitly specified in Section 6.3 of the TPS72018YZUR datasheet.

Can TPS72018YZUR operate with the IN pin left unconnected?

Yes - the TPS72018YZUR supports regulated output with IN floating under light loads (≤500 μA), sourcing current exclusively from the BIAS pin. This feature is documented in Sections 3 and 7.1 of the TPS72018YZUR datasheet and enables power-saving modes where upstream DC-DC converters are disabled.

What output capacitor value and type are required for TPS72018YZUR stability?

The TPS72018YZUR is stable with a minimum 2.2 μF ceramic capacitor (X5R or X7R dielectric) on the OUT pin. Maximum ESR must be <250 mΩ. TI validates this requirement across temperature and voltage range, and it is specified in Section 8.1.1 of the TPS72018YZUR datasheet.

Does TPS72018YZUR include built-in protection features?

Yes - the TPS72018YZUR integrates overcurrent limiting (420–800 mA), thermal shutdown (160°C trip, 140°C reset), and BIAS pin undervoltage lockout (2.41–2.49 V with 150 mV hysteresis). These protections are fully characterized and tested per JEDEC standards, as detailed in Section 6.5 of the TPS72018YZUR datasheet.

What is the purpose of the BIAS pin on TPS72018YZUR?

The BIAS pin powers the internal control circuitry independently of the main IN rail, allowing VIN to be as low as VOUT + 0.5 V while maintaining regulation. It must be ≥VOUT + 1.4 V or ≥2.5 V, and is bypassed with a 0.1 μF capacitor. This architecture improves efficiency in low-VIN applications and enables floating-IN operation - all confirmed in the TPS72018YZUR functional description.