Texas Instruments TPS72023YZUT

Overview

TPS72023YZUT from Texas Instruments is a 350 mA ultra-low VIN, RF-optimized low-dropout linear regulator with dual-rail bias architecture, delivering 2.3 V output at ±2% accuracy over –40°C to 125°C, 110 mV dropout at full load, and 48 μV_RMS output noise (10 Hz–100 kHz). It enables high-efficiency power delivery in space-constrained RF subsystems such as cellular camera phone baseband ICs and WLAN transceivers.

For engineers reviewing the TPS72023YZUT datasheet, TPS72023YZUT pinout, TPS72023YZUT application, or TPS72023YZUT equivalent, key selection criteria include its dual-rail (VIN/VBIAS) operation, 38 μA quiescent current, monotonic soft-start with 100 mA + I_LOAD inrush limiting, and stability with only 2.2 μF ceramic output capacitance - all critical for battery-powered RF LDO design.

Technical Context

The TPS72023YZUT employs an NMOS pass transistor with integrated body diode and advanced BICMOS process to achieve 110 mV dropout at 350 mA while maintaining 80 dB VIN PSRR (10 Hz–10 kHz) and 70 dB VBIAS PSRR (10 Hz–10 kHz). Its dual-rail architecture decouples control circuitry (powered by VBIAS ≥ V_OUT + 1.4 V or 2.5 V) from main power path (VIN ≥ V_OUT + 0.5 V), enabling use behind high-efficiency DC-DC converters.

A dedicated bias rail powers the error amplifier and reference, allowing regulation under light loads (<500 μA) even when VIN is floating - a feature enabled by internal charge-pump-assisted bias current sourcing. Thermal shutdown (160°C trip, 140°C reset) and foldback current limit (420–800 mA) provide robust fault protection without external components.

Key Specifications

Pinout & Package

TPS72023YZUT is packaged in a 1.33 mm × 0.96 mm, 5-ball DSBGA (YZU) package with bottom-side thermal pad. The package is optimized for minimal PCB footprint and high thermal performance in handheld RF applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS72023DRV, the TPS72023YZUT trades thermal performance for ultra-compact size - critical for camera modules - while both share identical regulation accuracy, noise, and transient response. Against TPS79523, the TPS72023YZUT delivers 40% higher current, 58% lower quiescent current, and unique bias-rail functionality essential for modern power-gated architectures.

Availability

TPS72023YZUT is available at Aetrix Electronics and suitable for cellular camera phones, WLAN transceivers, and digital camera image sensors requiring stable component supply with guaranteed long-term availability and traceable sourcing.

Supply support for TPS72023YZUT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision power management ICs.

The TPS720 family was designed specifically for RF and portable applications demanding ultra-low noise, dual-rail efficiency, and sub-1-mm² packaging - addressing the power integrity challenges of 4G/5G baseband and high-speed wireless SoCs.

FAQ

What is the minimum input voltage required for TPS72023YZUT to regulate 2.3 V output?

The TPS72023YZUT requires VIN ≥ V_OUT + 0.5 V = 2.8 V under recommended operating conditions. However, its dual-rail architecture allows the main input (VIN) to be as low as V_OUT + V_DO = 2.41 V (110 mV dropout) when VBIAS is properly biased. The BIAS pin must be ≥2.5 V or V_OUT + 1.4 V (3.7 V), whichever is greater. This enables operation from low-headroom sources while maintaining regulation - a key capability of the TPS72023YZUT.

Can TPS72023YZUT operate with the IN pin disconnected?

Yes - the TPS72023YZUT supports a unique VIN-floating mode where it regulates 2.3 V output under light loads (<500 μA) using current sourced solely from the BIAS pin. This feature is explicitly designed for power-saving scenarios, such as when a DC-DC converter feeding VIN is disabled during system sleep while the LDO must retain memory or sensor bias. Full 350 mA output is only available when VIN is connected and ≥2.8 V.

What output capacitor value and type are required for TPS72023YZUT stability?

The TPS72023YZUT is stable with a minimum 2.2 μF ceramic output capacitor - X5R or X7R dielectrics are recommended for minimal ESR and temperature drift. Maximum ESR must be ≤250 mΩ. Unlike many LDOs, it does not require tantalum or electrolytic capacitors. The 2.2 μF value also enables the specified 140 μs start-up time and ±15 mV load transient response. Using smaller values risks instability and degraded transient performance in the TPS72023YZUT.

How does the enable (EN) pin function on TPS72023YZUT?

The EN pin on the TPS72023YZUT is active-high with TTL/CMOS-compatible thresholds: device enables when V_EN ≥1.1 V and disables when V_EN ≤0.4 V. In shutdown, ground current drops to 0.5–2 μA, effectively halting output regulation. If enable functionality is unused, EN may be tied directly to VIN. The pin draws only 1 μA max, making it compatible with low-drive GPIOs - a critical interface feature for microcontroller-based power sequencing in the TPS72023YZUT.

What thermal considerations apply to TPS72023YZUT in DSBGA package?

The TPS72023YZUT in YZU (DSBGA-5) package has R_θJA = 144.9°C/W, meaning junction temperature rises ~145°C per watt of dissipated power in still air. For reliable operation at 350 mA output with 2.3 V V_OUT and 2.8 V VIN, power dissipation is (2.8 V − 2.3 V) × 0.35 A = 175 mW, resulting in ~25.4°C rise above ambient. TI recommends soldering the thermal pad to a solid GND plane to realize the full benefit of R_θJB = 27.5°C/W - a key thermal design requirement for the TPS72023YZUT.