Texas Instruments TPS74901KTWR
- Part No.:
- TPS74901KTWR
- Manufacturer:
- Texas Instruments
- Package:
- TO-263-8, D2PAK (7 Leads + Tab), TO-263CA
- Datasheet:
-
TPS74901KTWR.pdf
- Description:
- IC REG LIN POS ADJ 3A DDPAK
- Quantity:
- Payment:

- Shipping:

Inventory:1,904
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS74901KTWR from Texas Instruments is a 3A, ultra-low-dropout linear regulator with programmable soft-start, designed for high-accuracy point-of-load regulation in multi-rail server and networking systems. It supports 0.8V–3.6V output, operates from 0.8V input (with VBIAS), delivers 1% output accuracy over line/load/temperature (new chip), and features power-good signaling and active-high enable. It powers FPGA core rails and ASIC supply domains requiring monotonic start-up and tight voltage tolerance.
For engineers reviewing the TPS74901KTWR datasheet, TPS74901KTWR pinout, TPS74901KTWR application, or TPS74901KTWR equivalent, this page provides verified package mapping (DDPAK-7), confirmed pin functions including SS, PG, BIAS, and FB, real-world thermal performance data (RθJA = 33.8°C/W), and validated alternative options for enterprise power sequencing designs.
Technical Context
The TPS74901KTWR uses an NMOS pass transistor architecture powered by a dedicated VBIAS rail (2.7V–5.5V), enabling stable regulation at VIN as low as 0.8V while maintaining fast transient response. Its internal 0.8V reference and precision error amplifier achieve ±0.3% typical output accuracy over –40°C to +125°C.
Soft-start is implemented via external capacitor on the SS pin, providing monotonic ramp control with adjustable timing (e.g., 100µs typical with no capacitor). The open-drain PG output-available only in VQFN packages but not in KTW-requires external pull-up and asserts low when VOUT falls below 90% of nominal or during shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 3 A continuous; supports short-term surges up to 4.6 A before current limiting engages. |
| Dropout Voltage | 120 mV typical at 3 A; enables efficient regulation even with small VIN–VOUT margins (e.g., 1.2V out from 1.32V input). |
| Output Accuracy | ±1% over line, load, and temperature (–40°C to +125°C); ensures reliable operation for FPGA core supplies without margining overhead. |
| Input Voltage Range | 0.8 V to 5.5 V (VIN); requires VBIAS ≥ 2.7 V for full functionality-critical for low-VIN applications like intermediate bus converters. |
| Stability | Stable with any ceramic output capacitor ≥ 2.2 µF; eliminates need for ESR-tuned tantalum or polymer capacitors. |
| Thermal Resistance | RθJA = 33.8°C/W (KTW package); enables 3A operation at +85°C ambient with standard PCB copper area. |
| Power-Good Output | Open-drain PG signal (not present on KTW package); used for supply sequencing and fault monitoring in multi-rail systems. |
Pinout & Package
TPS74901KTWR is packaged in a 7-pin DDPAK/TO-263 (KTW) with exposed thermal pad soldered to PCB ground plane for enhanced thermal dissipation. Pin count and layout match industry-standard TO-263 footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| OUT | Regulated output | Main power delivery terminal; connects directly to load; requires ≥2.2 µF ceramic capacitor to GND for stability. |
| GND | Ground reference | Primary return path for load current and internal bias circuits; must be low-impedance connection to thermal pad. |
| BIAS | Bias supply input | Powers internal reference and control circuitry; enables low-VIN operation; must be ≥2.7 V and ≥VOUT + VDO(VBIAS). |
| IN | Main input supply | Unregulated input; current path through NMOS pass device; minimum VIN = VOUT + 120 mV (typical) at 3 A. |
| FB | Feedback input | Connects to resistor divider midpoint; sets output voltage; high-impedance node (≤30 nA leakage in new chip). |
| EN | Enable control | Active-high digital input; 0.4 V low threshold / 1.1 V high threshold with 50 mV hysteresis; tolerates slow-ramping signals. |
| SS | Soft-start timing | Capacitor-to-ground sets monotonic ramp time; floating defaults to ~100 µs; critical for inrush control into large FPGA capacitance. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Soft-Start | Monotonic output ramp controlled by external SS capacitor; prevents input rail collapse during FPGA/ASIC power-up. |
| VBIAS Architecture | Dedicated bias rail decouples control circuitry from main input, enabling stable 0.8V–3.6V output from sub-1V VIN sources. |
| Ultra-Low Dropout | 120 mV typical at 3 A allows use with narrow input-output margins-ideal for intermediate bus architectures (e.g., 3.3V → 3.0V). |
| High-Accuracy Regulation | ±1% total output error over full temperature and load range reduces need for system-level calibration or guard-banding. |
| Robust Thermal Protection | Thermal shutdown at 165°C with 25°C hysteresis; prevents damage during overload or poor heatsinking in dense server PCBs. |
Applications
| Network Attached Storage - Enterprise | Rack Servers |
|---|---|
Use Scenario: Powering dual-core ARM SoCs and DDR4 memory interfaces in 2U NAS enclosures with strict thermal envelope. IC Role / Device Role / Timing Role: Primary 1.2V core LDO delivering 3A with <100µs soft-start to meet SoC power-on reset timing. Use Value: Enables single-stage regulation from 3.3V intermediate bus, eliminating DC/DC + LDO cascades and reducing BOM count by one component. |
Use Scenario: Supplying FPGA configuration banks and transceiver analog rails in 48-slot rack servers with hot-swap capability. IC Role / Device Role / Timing Role: Sequenced post-regulator with PG signal tied to CPLD supervisor for safe power-up order. Use Value: 1% accuracy ensures compliance with FPGA VCCINT tolerance (±3%), avoiding configuration failures under thermal stress. |
| Network Interface Cards (NIC) | Merchant Network and Server PSU |
Use Scenario: Regulating 0.85V GPU compute cores on PCIe-based SmartNICs operating at 85°C ambient. IC Role / Device Role / Timing Role: High-current, low-noise LDO placed adjacent to ASIC die; thermal pad soldered to inner ground layer. Use Value: RθJA = 33.8°C/W allows full 3A output without heatsink, saving board space in constrained M.2 form factor. |
Use Scenario: Providing auxiliary 2.5V rail for PMBus controllers and fan drivers in modular server PSUs. IC Role / Device Role / Timing Role: Secondary regulated output enabled only after main 12V rail reaches regulation, using EN driven by upstream PG signal. Use Value: Active-high EN with built-in deglitching prevents false triggering from PSU startup transients, improving system reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS74801KTWR | Same 3A rating and KTW package, but lacks PG output and has 2% accuracy (legacy spec); soft-start fixed at 100µs. | No power-good signaling-unsuitable for sequenced multi-rail systems requiring supply monitoring. | Select only if PG is unused and cost sensitivity outweighs accuracy requirements. |
| TPL7407LDDCR | 7-channel 250mA array LDO; smaller 2mm × 2mm WSON; no VBIAS or soft-start; ±2% accuracy. | Designed for I/O rail consolidation-not a drop-in replacement for high-current core regulation. | Consider only for distributed low-current biasing where space is critical and sequencing is handled externally. |
Compared with TPS74901KTWR, TPS74801KTWR trades PG functionality and tighter accuracy for lower unit cost, while TPL7407LDDCR serves entirely different system roles-neither offers pin compatibility or functional equivalence for 3A core rail applications.
Availability
TPS74901KTWR is available at Aetrix Electronics and suitable for network attached storage, rack servers, and merchant PSU designs requiring stable component supply, long-lifecycle support, and guaranteed traceability for industrial OEM programs.
Supply support for TPS74901KTWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and high-reliability manufacturing.
The TPS74901 product line targets high-performance computing infrastructure, delivering precision, low-noise, and sequenced LDO regulation for FPGAs, ASICs, and multi-core processors in enterprise-class systems.
FAQ
What is the maximum output current capability of the TPS74901KTWR?
The TPS74901KTWR delivers up to 3 A continuously under recommended operating conditions. Its internal current limit is factory-trimmed to 4.6 A typical, engaging within ~10 µs during overload or short-circuit events. Sustained operation above 3 A is not advised due to thermal constraints-designers must verify junction temperature remains ≤125°C using RθJA = 33.8°C/W and actual PCB copper area.
Does the TPS74901KTWR include a power-good (PG) output?
No, the TPS74901KTWR does not include a power-good output. The PG pin is only available on the RGW (VQFN-20) package variant-not on the KTW (DDPAK-7) package. This is explicitly documented in the Pin Functions table and Functional Block Diagrams section of the datasheet. For designs requiring PG signaling, the RGW variant or alternate sequencing methods must be used.
What is the required capacitor value on the SS pin for a 5 ms soft-start time?
A 5 ms soft-start time requires approximately 47 nF on the SS pin, based on the soft-start charging current (ISS = 530 nA typical for new chip) and the 0.8 V internal reference. The relationship is tSS ≈ (0.8 V × CSS) / ISS. Using ISS = 530 nA yields CSS ≈ 47 nF. This value is consistent with typical application curves showing 5 ms ramp with ~47 nF in Figure 5-39 of the datasheet.
Can the TPS74901KTWR operate with VIN = VOUT (i.e., zero dropout)?
No, the TPS74901KTWR cannot operate with VIN = VOUT. Its minimum dropout voltage is 120 mV typical at 3 A, defined as the VIN–VOUT differential required to maintain regulation. Attempting VIN = VOUT will cause output collapse and possible thermal shutdown. Minimum valid VIN is VOUT + 120 mV (typical), and must also satisfy VBIAS requirements (≥2.7 V and ≥VOUT + VDO(VBIAS)).
What is the thermal pad connection requirement for the TPS74901KTWR?
The thermal pad on the underside of the TPS74901KTWR (KTW package) must be soldered to a solid PCB ground plane for effective heat dissipation. TI specifies this connection as mandatory-not optional-to achieve the rated RθJA = 33.8°C/W and sustain 3 A output at elevated ambient temperatures. Omitting or inadequately connecting the thermal pad increases junction temperature by >20°C and risks thermal shutdown under load.
TPS74901KTWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- TO-263-8, D2PAK (7 Leads + Tab), TO-263CA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 1
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 3.6V
- Voltage Dropout (Max):
- 0.28V @ 3A
- Current - Output:
- 3A
- Current - Quiescent (Iq):
- -
- Current - Supply (Max):
- -
- PSRR:
- 60dB ~ 30dB (1kHz ~ 300kHz)
- Control Features:
- Enable, Power Good, Soft Start
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TO-263 (DDPAK-7)
TPS74901KTWR FAQ
1.How can I place an order for TPS74901KTWR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS74901KTWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS74901KTWR reliable?
The price and inventory of TPS74901KTWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS74901KTWR is usually 5 days.
3.What payment methods are accepted for TPS74901KTWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS74901KTWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS74901KTWR?
TPS74901KTWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS74901KTWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS74901KTWR?
For technical support, including TPS74901KTWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS74901KTWR requirements.
6.How does Aetrix verify that TPS74901KTWR is sourced from the original manufacturer or authorized distributors?
All TPS74901KTWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS74901KTWR meets industry standards.
7.What is the process for return or replacement of TPS74901KTWR?
All TPS74901KTWR units undergo pre-shipment inspection (PSI). If there is an issue with TPS74901KTWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS74901KTWR part is unused and in its original packaging.
Return procedure for TPS74901KTWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS74901KTWR Tags

-
MIC5504-1.8YM5-TR
Microchip Technology

-
MIC5504-3.3YM5-TR
Microchip Technology

-
MIC5365-3.0YC5-TR
Microchip Technology

-
MIC5365-1.8YC5-TR
Microchip Technology

-
MIC5365-2.5YC5-TR
Microchip Technology

-
MIC5365-3.3YC5-TR
Microchip Technology

-
MIC5365-3.3YD5-TR
Microchip Technology

-
MIC5317-3.3YM5-TR
Microchip Technology

-
TLV1117LV33DCYR
Texas Instruments

-
MIC5317-3.3YMT-TZ
Microchip Technology

-
MIC5528-3.3YMT-TR
Microchip Technology

-
TLV75801PDRVR
Texas Instruments
Tech Hub
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…

