Texas Instruments TPS7A1128PDRVR

Overview

TPS7A1128PDRVR from Texas Instruments is a 500-mA ultra-low dropout linear regulator (LDO) with dual-rail input architecture (IN + BIAS), supporting 0.75 V to 3.3 V input and fixed 2.8 V output. It delivers 1.5% output accuracy over load, line, and temperature (–40°C to 125°C), 140 mV max dropout at 500 mA (DRV package), and 1.6 µA typical IN-pin quiescent current - enabling high-efficiency power delivery to low-voltage microcontroller cores and analog sensors in space-constrained portable electronics.

For engineers reviewing the TPS7A1128PDRVR datasheet, TPS7A1128PDRVR pinout, TPS7A1128PDRVR application, or TPS7A1128PDRVR equivalent, key selection criteria include its LILO (low-input/low-output) capability enabled by separate IN/BIAS rails, active output discharge (120 Ω pulldown), thermal shutdown (160°C), and compatibility with ceramic capacitors as small as 2.2 µF on IN/OUT and 0.1 µF on BIAS.

Technical Context

The TPS7A1128PDRVR implements a dual-supply LDO architecture where the IN pin supplies power to the pass element while the BIAS pin powers internal control circuitry - decoupling regulation performance from ultra-low input voltage constraints. This enables stable 2.8 V output even when VIN is as low as 2.94 V (2.8 V + 140 mV dropout).

It integrates global UVLO (with independent 675 mV rising / 600 mV falling thresholds on IN and 1.54 V / 1.44 V on BIAS), foldback current limiting (990 mA typ. for DRV package), and active discharge activated on EN low or thermal shutdown - all within a thermally enhanced 2.0 mm × 2.0 mm WSON-6 package with exposed thermal pad.

Key Specifications

Pinout & Package

TPS7A1128PDRVR is housed in a 2.0-mm × 2.0-mm WSON-6 package (DRV) with exposed thermal pad. The thermal pad must be connected to ground for optimal thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-dropout regulator applications.

Compared with TPS7A1125PDRVR, the TPS7A1128PDRVR provides higher output voltage for improved noise margin in 2.8 V I/O domains; compared with TPL7407LPDQ, it delivers precision regulation and dual-rail efficiency - making it irreplaceable for core power delivery in LILO systems.

Availability

TPS7A1128PDRVR is available at Aetrix Electronics and suitable for smart wearables, portable medical devices, and solid-state drives requiring stable component supply, long-term lifecycle support, and traceable sourcing for production ramp.

Supply support for TPS7A1128PDRVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability, low-power IC design.

The TPS7A11 family was engineered specifically for ultra-low-voltage, ultra-low-power applications - targeting battery-operated devices where every millivolt of dropout and microamp of quiescent current directly impacts runtime and thermal envelope.

FAQ

What is the minimum input voltage required for TPS7A1128PDRVR to regulate 2.8 V output?

The TPS7A1128PDRVR requires a minimum input voltage of 2.94 V (2.8 V + 140 mV max dropout) on the IN pin when delivering 500 mA. However, its dual-rail architecture allows operation with lower effective VIN by leveraging the BIAS pin - for example, with VIN = 2.0 V and VBIAS = 3.3 V, the device maintains regulation and delivers full 500 mA. The IN UVLO threshold is 675 mV (rising), so VIN must exceed this to enable startup.

Does TPS7A1128PDRVR support active output discharge, and how does it work?

Yes, TPS7A1128PDRVR includes active output discharge via an internal 120 Ω pulldown resistor connected to GND when the EN pin is driven low or during thermal shutdown. This feature ensures the OUT pin discharges rapidly to a known low state, preventing undefined logic levels or latch-up in downstream circuitry. Discharge time depends on COUT and parallel load resistance per t = 120·RL/(120+RL)·COUT - for example, with 10 µF COUT and 10 kΩ load, discharge completes in ~1.2 ms.

Can TPS7A1128PDRVR be used without connecting the BIAS pin?

No - the BIAS pin is mandatory for operation. The TPS7A1128PDRVR requires a valid BIAS supply between 1.7 V and 5.5 V to power its internal control circuitry, even when VIN is present. Leaving BIAS unconnected or below 1.7 V will prevent regulation regardless of IN voltage. If a dedicated BIAS source is unavailable, TI recommends tying BIAS to VIN only if VIN ≥ 1.7 V and remains stable above the 1.54 V rising UVLO threshold.

What are the recommended capacitor values for TPS7A1128PDRVR?

Texas Instruments specifies 2.2 µF ceramic capacitors (X5R/X7R, ≤250 mΩ ESR) on both IN and OUT pins, and a 0.1 µF ceramic capacitor on the BIAS pin. All capacitors must be placed as close as possible to their respective pins. Larger values (up to 22 µF on OUT) are acceptable and improve transient response; smaller values risk instability or degraded PSRR. The EN pin does not require external capacitance.

How does the global UVLO function in TPS7A1128PDRVR?

The TPS7A1128PDRVR implements a global UVLO that ANDs two independent undervoltage detectors: one on IN (675 mV rising / 600 mV falling) and one on BIAS (1.54 V rising / 1.44 V falling). Both rails must rise above their respective thresholds before the device enables; if either falls below its threshold, the regulator shuts down. This prevents partial operation and ensures predictable startup/shutdown sequencing in multi-rail systems - critical for avoiding data corruption in memory or sensor interfaces.