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Texas Instruments TPS9104IPTR
- Part No.:
- TPS9104IPTR
- Manufacturer:
- Texas Instruments
- Category:
- Telecom
- Package:
- -
- Datasheet:
-
TPS9104IPTR.pdf
- Description:
- TELECOM CIRCUIT, 1-FUNC, PQFP48
- Quantity:
- Payment:
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Inventory:9,000
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Product details
Overview
TPS9104IPTR from Texas Instruments is a highly integrated power-supply and audio system IC for cellular handsets, featuring three 100-mA low-dropout regulators (3.3 V/3 V selectable), dual differential speaker/ringer amplifiers (2 VPP into 32 Ω), a low-noise microphone amplifier (100× gain, 3 VPP into 10 kΩ), 250-ms microprocessor reset, and a configurable charge-pump driver - all in a single 48-pin TQFP package.
For engineers reviewing the TPS9104IPTR datasheet, TPS9104IPTR pinout, TPS9104IPTR application, or TPS9104IPTR equivalent, key selection considerations include LDO dropout voltage (100 mV at 100 mA), depop-protected audio outputs, shutdown current (<1 µA), regulator enable sequencing, and compatibility with NiMH/NiCd (3–4 cell) or Li-ion battery inputs.
Technical Context
The TPS9104IPTR implements three independent PMOS-based LDOs with 1-Ω series pass transistors, each programmable to 3.3 V or 3 V via dedicated logic inputs (PL/PA/PB), and stabilized using external compensation capacitors (CL/CA/CB) tolerant of up to 15 Ω ESR. Regulator L powers the internal reference and reset generator, enabling VA/VB and amplifiers only after RESET asserts high.
Its audio subsystem integrates two Class-AB differential amplifiers (SPKR/RNGR) with internal depop circuitry, a high-gain (AV = 100) microphone amplifier referenced to VA, and a charge-pump driver configurable as inverter or doubler (50–150 kHz, 15–30 Ω output resistance) - all controlled by TTL-compatible enables with 10-µA pullups and RESET-gated activation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LDO Output Current | 100 mA per regulator - supports digital baseband, analog RF, and logic subsystems independently. |
| Dropout Voltage | 100 mV at 100 mA - enables stable regulation down to 3.1 V input for 3 V outputs, critical for fading battery operation. |
| Reset Timeout | 250 ms - ensures reliable microprocessor initialization during power-up across –40°C to 85°C ambient. |
| Shutdown Current | 0.5–10 µA - extends standby time in battery-powered cellular terminals. |
| Audio Output Swing | 2 VPP into 32 Ω - drives standard dynamic earpieces and piezo ringer elements without external boost stages. |
| Reference Accuracy | 1.161–1.209 V at 0–2 mA load - provides stable bias for precision analog blocks and external ADC references. |
| Charge-Pump Frequency | 50–150 kHz - balances efficiency and EMI for LCD bias or SIM module supply generation. |
Pinout & Package
TPS9104IPTR is housed in a 48-pin Thin Quad Flat Package (TQFP-PT), thermally rated for 1350 mW at 25°C free-air temperature with 93°C/W junction-to-ambient thermal resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (1,15,25,36) | Ground reference | Multiple dedicated ground pins minimize noise coupling between power, analog, and digital sections. |
| VCC (2,31,40) | Main supply input | Three separate VCC pins require external connection to battery rail for low-impedance power delivery. |
| VA/VB/VL (23,38,45) | LDO outputs | Programmable 3.3 V/3 V regulated supplies - VL powers core logic; VA/VB serve analog/audio subsystems. |
| SPKR_OUT+/– (39,42) | Speaker amplifier outputs | Differential drive eliminates need for output coupling capacitor; supports 32 Ω dynamic or 90-nF piezo loads. |
| RNGR_OUT+/– (4,5) | Ringer amplifier outputs | Matched differential pair with identical drive capability to SPKR outputs for dual-tone alert generation. |
| MIC_IN+/– (21,19) | Microphone amplifier inputs | High-CMRR, low-bias-input stage optimized for electret microphone interfacing with 100× fixed gain. |
| RESET (8) | Open-drain reset signal | 250-ms active-low pulse with 30-µA internal pullup - directly interfaces microprocessor reset input without external components. |
| EN_A/EN_B/SPKR_EN/… (26,35,47,7,27,14) | Individual enable inputs | TTL-compatible logic-low enables allow granular power sequencing and dynamic subsystem shutdown. |
Key Features
| Feature | Design Value |
|---|---|
| Depop protection on all amplifiers | Eliminates turn-on/turn-off "pop" noise in speaker, ringer, and microphone paths - essential for user-facing audio quality. |
| 1-Ω PMOS LDO architecture | Enables 100-mV dropout at full 100-mA load while maintaining stability with cost-effective, high-ESR ceramic or tantalum output capacitors. |
| RESET with UVLO and OTP monitoring | Guarantees clean system boot only when VCC exceeds 1.8 V and die temperature stays below 160°C - prevents erratic behavior during brownout or thermal stress. |
| Configurable charge-pump driver | Supports both inverting (–VCC) and doubling (2×VCC) topologies via external diode/capacitor network - enables flexible biasing for LCDs or GaAs PAs. |
| Independent regulator programming | PL/PA/PB pins set each LDO's output to 3.3 V (logic low) or 3 V (logic high) - allows mixed-voltage SoC interfacing without external resistive dividers. |
Applications
| Cellular Handset Power Management | Mobile Audio Subsystem |
|---|---|
Use Scenario: Powering baseband processor, RF transceiver, and memory in 2G/3G feature phones with 3–4-cell NiMH or single-cell Li-ion batteries. IC Role / Device Role / Timing Role: Central power management IC providing sequenced, low-noise, and battery-efficient regulation for multiple voltage domains. Use Value: Enables >100-hour standby via <1 µA shutdown current and maintains stable 3.3 V/3 V rails down to 3.1 V input using 100-mV dropout LDOs. | Use Scenario: Driving earpiece speaker, vibration motor (via ringer amp), and electret microphone in compact handheld form factors. IC Role / Device Role / Timing Role: Integrated audio front-end delivering differential speaker/ringer outputs and high-SNR microphone preamplification. Use Value: Delivers 2 VPP into 32 Ω with <1% THD at 1 kHz and 10 µVrms input noise - meets GSM audio quality requirements without external op-amps. |
| Subscriber Identity Module (SIM) Supply | Low-Power Embedded Communication Terminal |
Use Scenario: Generating regulated 5 V for SIM card interface in European cellular modules requiring ISO/IEC 7816 compliance. IC Role / Device Role / Timing Role: Charge-pump driver configured as voltage doubler, followed by external LDO to produce precise 5 V SIM supply. Use Value: Eliminates need for dedicated DC/DC converter - reduces BOM count and PCB area while supporting 5-V SIM operation from 2.7–4.2 V battery range. | Use Scenario: Enabling ultra-low-power wake-on-ring functionality in IoT-connected voice terminals or emergency beacons. IC Role / Device Role / Timing Role: System-level power/audio hub with remote ON_REM control, depop-protected ringer output, and microprocessor reset coordination. Use Value: Achieves sub-µA deep-sleep current and fast 250-ms wake-and-respond latency - critical for battery life in intermittently active devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-supply/audio system applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65120RGTR | Single 3.3-V LDO + dual charge pumps (±1.5×); no integrated audio amplifiers or microphone preamp. | Suitable for display biasing only - lacks speaker/ringer/mic functions required for full handset audio. | Select when audio integration is unnecessary and higher charge-pump current (100 mA) is needed for OLED panels. |
| LM4808MM/NOPB | Standalone 1.1-W mono speaker amplifier with shutdown; no LDOs, charge pump, or reset generator. | Requires external regulators and power sequencing logic - increases system complexity and component count. | Choose only for audio-only upgrades where existing power management is already implemented. |
Compared with TPS9104IPTR, TPS65120RGTR offers superior charge-pump performance but omits all audio functions, while LM4808MM/NOPB delivers higher speaker output power yet forces designers to source and sequence three separate LDOs and a reset IC - making TPS9104IPTR the only monolithic solution for complete cellular terminal power/audio integration.
Availability
TPS9104IPTR is available at Aetrix Electronics and suitable for cellular handset design, battery-powered communication terminals, and embedded audio subsystems requiring stable component supply, long-lifecycle support, and legacy automotive-grade reliability.
Supply support for TPS9104IPTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability IC design.
The TPS9104 product line was engineered specifically for early digital cellular handsets (1996–2005 era), integrating power regulation, audio amplification, and system control into one die to reduce size, cost, and design risk in space-constrained portable terminals.
FAQ
What is the operating temperature range for the TPS9104IPTR?
The TPS9104IPTR operates across a free-air temperature range of –40°C to 85°C, validated per its absolute maximum ratings and recommended operating conditions. This range supports deployment in consumer handheld environments including outdoor use and automotive cabin installations. Thermal shutdown activates at 160°C junction temperature, with 10°C hysteresis, ensuring robustness against transient overheating. The TPS9104IPTR datasheet specifies electrical characteristics over this full industrial range, and the 48-pin TQFP package provides adequate thermal dissipation for typical handset power levels.
How does the TPS9104IPTR manage power sequencing between its LDOs and amplifiers?
The TPS9104IPTR enforces strict power sequencing: Regulator L must reach rated voltage and assert RESET high before Regulators A/B and the charge-pump driver are enabled. Amplifiers (SPKR, RNGR, MIC) remain disabled until RESET is high and their individual enables (SPKR_EN, RNGR_EN, MIC_EN) are asserted. This prevents uncontrolled turn-on transients and ensures stable reference and logic supply prior to analog subsystem activation. All enables are TTL-compatible with 10-µA internal pullups, and EN_A/EN_B are inactive until RESET goes high - a behavior explicitly defined in the TPS9104IPTR functional description.
Can the TPS9104IPTR drive a piezoelectric ringer element, and what are the interface requirements?
Yes, the TPS9104IPTR ringer amplifier (RNGR_OUT+/–) is explicitly designed to drive 90-nF piezoelectric speakers, delivering 2 VPP output swing into that capacitive load. No external coupling capacitor is needed due to the differential output architecture. The ringer amplifier requires only two external gain-setting resistors and follows the same depop-controlled enable timing as the speaker amplifier. Its input (RNGR_IN) accepts single-ended signals, and it shares the same 2-mA quiescent current and <1% THD performance as the SPKR amplifier - confirmed in the TPS9104IPTR electrical characteristics tables.
What is the purpose of the AREF pin on the TPS9104IPTR, and how should it be decoupled?
The AREF pin on the TPS9104IPTR provides a buffered analog reference voltage (1.221 V when PL = VCC; 1.345 V when PL = 0 V) derived from the internal bandgap, intended for external analog circuitry requiring a stable bias point. A 0.1-µF capacitor must be connected from AREF to ground; no other connections are permitted. This decoupling ensures low-noise operation and prevents instability in sensitive analog blocks such as external ADCs or sensor interfaces. The TPS9104IPTR datasheet explicitly prohibits additional loading beyond the specified capacitor, and AREF is not intended as a general-purpose voltage reference for high-current applications.
Does the TPS9104IPTR support battery voltage monitoring or fuel gauging functions?
No, the TPS9104IPTR does not include built-in battery voltage monitoring, ADC, or fuel gauging circuitry. Its undervoltage lockout (UVLO) function (1.8–2.52 V threshold) is solely for internal power-on reset and does not provide an analog output or digital flag for system-level battery state reporting. The device monitors only its own supply (VCC) and regulator L output (VL) for reset generation and thermal protection. Battery monitoring must be implemented externally using dedicated fuel gauge ICs or microcontroller ADC channels - a limitation clearly reflected in the TPS9104IPTR functional block diagram and feature list, which omit any voltage-sense or telemetry capability.
TPS9104IPTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- -
- Interface:
- -
- Number of Circuits:
- -
- Voltage - Supply:
- -
- Current - Supply:
- -
- Power (Watts):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
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- -
- Supplier Device Package:
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TPS9104IPTR FAQ
1.How can I place an order for TPS9104IPTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS9104IPTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS9104IPTR reliable?
The price and inventory of TPS9104IPTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS9104IPTR is usually 5 days.
3.What payment methods are accepted for TPS9104IPTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS9104IPTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS9104IPTR?
TPS9104IPTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS9104IPTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS9104IPTR?
For technical support, including TPS9104IPTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS9104IPTR requirements.
6.How does Aetrix verify that TPS9104IPTR is sourced from the original manufacturer or authorized distributors?
All TPS9104IPTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS9104IPTR meets industry standards.
7.What is the process for return or replacement of TPS9104IPTR?
All TPS9104IPTR units undergo pre-shipment inspection (PSI). If there is an issue with TPS9104IPTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS9104IPTR part is unused and in its original packaging.
Return procedure for TPS9104IPTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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