Texas Instruments TPS92020DR

Overview

TPS92020DR from Texas Instruments is an LLC resonant-switching LED driver controller in SOIC-8 package, designed for multi-string high-power LED lighting systems. It delivers fixed or variable-frequency half-bridge control with programmable dead time (390–450 ns), soft-start timing, and integrated 0.4-A source / 0.8-A sink gate drivers-enabling >95% efficiency in commercial high-bay and street lighting drivers.

For engineers reviewing the TPS92020DR datasheet, TPS92020DR pinout, TPS92020DR application, or TPS92020DR equivalent, this page provides verified technical context, SOIC-8 terminal mapping, real-world lighting system integration guidance, and two validated alternative controllers for LLC-based LED driver designs.

Technical Context

The TPS92020DR implements Pulse Frequency Modulation (PFM) to regulate output voltage by dynamically adjusting switching frequency between 30 kHz and 350 kHz based on feedback from the RT pin current. Its internal oscillator achieves ±4% min-frequency tolerance across –40°C to 125°C, enabling precise resonant tank impedance control without external timing crystals.

It integrates dual gate drivers with <50 ns on-time mismatch, a dedicated OC pin for current-sense fault detection (1.0 V trip, 0.6 V recovery), and thermal shutdown at 160°C with 20°C hysteresis. Dead time is set via a single resistor to DT pin using an internal 2.25-V reference, ensuring zero-voltage switching while preventing shoot-through.

Key Specifications

Pinout & Package

TPS92020DR is housed in an industry-standard SOIC-8 package (5.0 mm × 6.2 mm, 1.27 mm pitch) with exposed pad optional per TI package addendum. Thermal performance supports 267 mW continuous power dissipation at 85°C ambient.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LLC resonant LED driver controller applications.

Compared with UCC28810DR and NCP1397ADR2G, the TPS92020DR uniquely combines variable-frequency PFM, integrated burst mode, and dual-level OC protection in a single SOIC-8 package-reducing BOM count by 3–5 components versus alternatives requiring external timers or fault comparators.

Availability

TPS92020DR is available at Aetrix Electronics and suitable for commercial LED high-bay lighting, street & area lighting, and stadium lighting requiring stable component supply, long-term lifecycle support, and automotive-grade reliability validation.

Supply support for TPS92020DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management solutions with over 50 years of innovation in power conversion ICs.

The TPS92020DR belongs to TI's LED lighting controller product line, engineered specifically for high-efficiency, high-reliability resonant topologies in commercial and industrial solid-state lighting systems.

FAQ

What is the recommended minimum dead time setting for TPS92020DR in high-efficiency LLC designs?

The TPS92020DR enforces a minimum dead time of 120 ns when the DT pin is shorted to ground, but optimal ZVS operation occurs at 390–450 ns (set via 3.3–39 kΩ resistor). Using the 120 ns default risks increased turn-off losses and reduced efficiency-TI recommends 16.9 kΩ (420 ns) for most 100–200 W LED drivers per SLUSA54 Section 7.3. The TPS92020DR's internal 2.25-V reference ensures consistent dead time across temperature.

How does TPS92020DR implement burst-mode operation, and when is it triggered?

The TPS92020DR enters burst mode automatically when the control loop demands switching frequency above 350 kHz-typically during very light loads (<5% of rated output). Gate drive stops until frequency demand falls below 330 kHz, then soft-start resumes. This prevents output overvoltage caused by parasitic capacitor coupling. Burst mode can be disabled by limiting max frequency to ≤350 kHz via RT pin resistor network-no firmware or external logic required. The TPS92020DR handles this entirely in hardware.

Can TPS92020DR drive MOSFETs directly, or is a gate-driver transformer required?

The TPS92020DR is designed to drive gate-driver transformers-not discrete MOSFETs-due to its 0.4-A source / 0.8-A sink capability and transformer-coupled half-bridge topology. Direct MOSFET drive is not supported: GD1/GD2 outputs lack high-side floating supplies and level-shifting circuitry. TI's reference designs (e.g., TIDA-00169) use 1:1:1 gate-drive transformers with DC-blocking capacitors to ensure symmetrical drive and prevent saturation. Attempting direct drive will cause shoot-through or insufficient gate voltage swing.

What are the exact overvoltage and undervoltage lockout thresholds for TPS92020DR's VCC pin?

The TPS92020DR VCC UVLO has a rising threshold of 9.9–11.1 V (typ. 10.5 V) and falling threshold of 8.9–10.1 V (typ. 9.5 V), providing 0.7–1.3 V hysteresis. Its OVP triggers at 18–22 V (rising) and recovers at 16–20 V (falling), with 1.5–2.5 V hysteresis. These thresholds are factory-trimmed and tested across temperature-no external resistors needed. During UVLO, GD1/GD2 are actively pulled low; during OVP, both outputs are forced low until VCC drops below 18 V, then soft-start resumes. This behavior is guaranteed for every TPS92020DR unit.

Does TPS92020DR support digital dimming interfaces like DALI or PWM?

The TPS92020DR does not include native DALI, PWM, or 0–10 V interface circuitry-it relies on external analog feedback injected into the RT pin to modulate switching frequency. For DALI systems, a separate microcontroller or DALI-ANALOG translator IC must convert digital commands to RT pin current. For PWM dimming, a low-pass filter converts PWM duty cycle to analog voltage, then a transconductance amplifier converts it to RT current. The TPS92020DR itself only interprets RT current magnitude-no protocol decoding is performed internally.