Texas Instruments TRF372017IRGZT
- Part No.:
- TRF372017IRGZT
- Manufacturer:
- Texas Instruments
- Category:
- RF Modulators
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TRF372017IRGZT.pdf
- Description:
- RF MODULATOR 300MHZ-4.8GHZ 48QFN
- Quantity:
- Payment:

- Shipping:

Inventory:201
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TRF372017IRGZT from Texas Instruments is a fully integrated IQ modulator with on-chip integer/fractional PLL and VCO, operating from 300 MHz to 4.8 GHz LO frequency, delivering 11.5 dBm P1dB, 26 dBm OIP3, –132 dBc/Hz phase noise at 1 MHz offset (2.3 GHz), and –160 dBm/Hz noise floor-used in LTE and WCDMA wireless infrastructure transceivers.
For engineers reviewing the TRF372017IRGZT datasheet, TRF372017IRGZT pinout, TRF372017IRGZT application, or TRF372017IRGZT equivalent, key selection considerations include its dual-path baseband interface (BBI_P/N, BBQ_P/N), SPI-controlled VCO tuning and DC offset calibration, integrated charge pump (CP_OUT), VTUNE input, and RFOUT/LO_OUT differential outputs for direct upconversion architectures.
Technical Context
The TRF372017IRGZT implements a high-linearity direct-conversion IQ modulator with internal 5-kΩ baseband input termination and programmable 8-bit DC offset D/A for carrier cancellation. Its PLL employs a fractional-N architecture with configurable PFD frequency up to 100 MHz and SPI-programmable charge pump current (1.94 mA typical).
The integrated VCO supports continuous tuning from 2.4–4.8 GHz, with on-chip dividers (÷1/÷2/÷4/÷8) enabling LO outputs from 300 MHz to 4.8 GHz. Baseband inputs accept 1-GHz bandwidth differential signals, and RF output is internally matched to 50 Ω with AC-coupled operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| LO Frequency Range | 300 MHz to 4.8 GHz - enables single-device coverage across LTE Bands 1–42, WCDMA, TD-SCDMA, and WiMAX. |
| P1dB Output Power | 11.5 dBm - sufficient drive level to directly interface with PA stages without intermediate gain blocks in macrocell BTS designs. |
| OIP3 | 26 dBm - ensures linear operation under multi-carrier WCDMA conditions with low distortion and adjacent-channel leakage. |
| Phase Noise | –132 dBc/Hz at 1 MHz offset (fVCO = 2.3 GHz) - meets stringent EVM requirements for 64-QAM LTE transmission. |
| Noise Floor | –160 dBm/Hz - minimizes receiver desensitization in shared transceiver architectures with tight isolation constraints. |
| Baseband BW | 1000 MHz - supports wideband modulation schemes including 100-MHz OFDM carriers in 5G NR FR1. |
| Supply Current (LO on) | 367 mA total (250 mA @ 3.3 V + 117 mA @ 5 V) - defines thermal budget and power supply sizing for dense RF front-end layouts. |
Pinout & Package
TRF372017IRGZT is housed in a 48-pin VQFN package (7.0 mm × 7.0 mm, 0.5-mm pitch) with exposed thermal pad. Pin functions are validated per TI SLWS224E Rev E datasheet (January 2016), including dedicated analog/digital ground separation and multiple isolated power domains (VCC_VCO1/2, VCC_PLL, VCC_DIG, VCC_MIX, VCC_D2S).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| BBI_P / BBI_N | Differential I-channel baseband input | 5-kΩ internal termination to VCM; requires external 100-Ω differential load when VCM is internally generated. |
| BBQ_P / BBQ_N | Differential Q-channel baseband input | Same termination and coupling as BBI; enables quadrature modulation with <0.5° phase error and <0.1-dB gain mismatch. |
| RFOUT | Modulated RF output | Internally matched 50-Ω single-ended output; AC-coupled, capable of –10 dBm WCDMA signal with 76-dBc ACPR. |
| LO_OUT_P / LO_OUT_N | Differential LO output | Open-collector; requires external pull-up and AC coupling; supports ÷1/÷2/÷4/÷8 division for flexible frequency planning. |
| VTUNE | VCO tuning voltage input | Analog control node for external loop filter connection; accepts 0.3–3.0 V range for full VCO band coverage. |
| CP_OUT | Charge pump output | Drives external loop filter; SPI-configurable current (1.94 mA typical); requires low-noise RC network for PLL stability. |
| CLK / DATA / LE | 3-wire SPI interface | Non-multiplexed serial bus; 20-ns timing margins support reliable programming at ≥20-MHz clock rates. |
| PS | Power-save mode enable | Active-high logic input; reduces supply current by >50% while maintaining VCO lock for fast wake-up in TDD systems. |
Key Features
| Feature | Design Value |
|---|---|
| Fully integrated PLL/VCO + IQ modulator | Eliminates discrete LO synthesis and modulator ICs, reducing bill-of-materials and PCB area in macrocell and small-cell radios. |
| Programmable baseband DC offset (8-bit D/A) | Enables real-time carrier suppression adjustment to <–43 dBc without external op-amps or trimming components. |
| Independent LO output dividers (÷1/÷2/÷4/÷8) | Allows reuse of same device across multiple bands (e.g., 2.6 GHz ÷2 = 1.3 GHz for Band 38/40, ÷4 = 650 MHz for Band 12). |
| Multi-rail power architecture | Separate VCC_VCO1/2, VCC_PLL, VCC_DIG, and VCC_MIX supplies isolate noise coupling between analog, RF, and digital domains. |
| SPI-controlled power-save mode | Reduces total current from 367 mA to 138 mA (LO off) or 117 mA (PS on), critical for energy-efficient TDD base stations. |
Applications
| Wireless Infrastructure Transmitter | Point-to-Point Microwave Radio |
|---|---|
Use Scenario: High-power macrocell BTS transmitting 4×4 MIMO LTE signals across 700–2700 MHz bands. IC Role / Device Role / Timing Role: Direct-conversion IQ modulator with integrated PLL/VCO provides LO synthesis and RF upconversion in single-chip solution. Use Value: Achieves –75 dBc ACPR at –8 dBm output with 76-dBc WCDMA compliance, eliminating need for external calibration or predistortion circuitry. | Use Scenario: 5-GHz licensed backhaul link requiring low-phase-noise LO and high linearity for 256-QAM modulation. IC Role / Device Role / Timing Role: Generates clean 5.8-GHz LO (via ÷2 from 11.6-GHz VCO) and upconverts baseband to RF with <0.5° I/Q imbalance. Use Value: –132 dBc/Hz phase noise at 1 MHz offset ensures <2.5% EVM at 256-QAM, meeting FCC Part 101 spectral mask requirements. |
| Wireless MAN Wideband Transceiver | TD-LTE Small Cell Base Station |
Use Scenario: Fixed wireless access node supporting 20-MHz channels in 3.5-GHz CBRS band with dynamic TDD switching. IC Role / Device Role / Timing Role: Provides fast-locking LO generation and modulator path with PS-mode for rapid TX/RX state transitions. Use Value: Power-save mode cuts current by >60%, enabling fanless thermal design in compact outdoor enclosures. | Use Scenario: Indoor pico/femtocell serving 16+ users with simultaneous UL/DL scheduling in TDD-LTE. IC Role / Device Role / Timing Role: Delivers precise I/Q modulation with programmable DC offset correction to maintain carrier suppression across temperature. Use Value: Internal 8-bit D/A adjusts I/Q DC offset in real time, sustaining <–40 dBc carrier feedthrough over –40°C to +85°C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar IQ modulator with integrated PLL/VCO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADRF6720-27ACPZ-R7 | Wider LO range (100 MHz–6 GHz), higher P1dB (13.5 dBm), but no integrated VCO - requires external VCO or synthesizer. | Used where ultra-low phase noise (<–137 dBc/Hz) or extended low-frequency coverage is required; not suitable for fully self-contained LO synthesis. | Select when system already includes high-performance external VCO and prioritizes modulator linearity over integration. |
| LMX2594RHAR | PLL/VCO-only (no modulator); 10-MHz–15-GHz range, –236 dBc/Hz normalized phase noise; requires external IQ modulator. | Used in high-end test equipment or phased-array radar where independent optimization of LO and modulation paths is mandatory. | Select only when modulator and LO synthesis must be decoupled for calibration flexibility or multi-antenna coherence. |
Compared with ADRF6720-27 and LMX2594, the TRF372017IRGZT uniquely integrates both high-linearity IQ modulation and wideband fractional-N PLL/VCO in one die, reducing component count and layout complexity-ideal for cost-sensitive, space-constrained wireless infrastructure designs where full integration outweighs marginal performance trade-offs.
Availability
TRF372017IRGZT is available at Aetrix Electronics and suitable for wireless infrastructure transmitters, point-to-point microwave radios, and TD-LTE small cell base stations requiring stable component supply, long-term manufacturability, and consistent RF performance across production batches.
Supply support for TRF372017IRGZT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The TRF372017IRGZT belongs to TI's RF silicon portfolio designed specifically for wireless infrastructure applications-emphasizing integration, linearity, and thermal robustness in high-density macrocell and small-cell radio designs.
FAQ
What is the maximum reference input frequency supported by the TRF372017IRGZT?
The TRF372017IRGZT supports reference input frequencies up to 160 MHz, as specified in the Electrical Characteristics table under "Reference oscillator parameters." This allows direct use of common TCXO or crystal oscillator sources without prescaling, simplifying clock tree design in LTE and WCDMA base stations. The device maintains PLL lock stability and low phase noise even at the upper limit of this range.
Does the TRF372017IRGZT support external LO injection?
Yes, the TRF372017IRGZT supports external LO injection via the EXT_VCO pin (Pin 36), which accepts high-impedance, AC-coupled signals. When enabled, the internal VCO is disabled and the external LO drives the modulator directly-enabling hybrid architectures where ultra-low-noise external synthesizers replace the on-chip VCO for demanding applications like microwave backhaul.
How does the power-save (PS) mode affect VCO lock status in the TRF372017IRGZT?
In power-save mode (PS = high), the TRF372017IRGZT disables non-critical bias circuits while maintaining VCO lock via the charge pump and loop filter, allowing sub-100-µs wake-up to full operation. Total supply current drops from 367 mA (LO on) to 117 mA, making it ideal for TDD systems where rapid TX/RX switching is required without reacquiring lock.
What baseband interface configuration does the TRF372017IRGZT require for optimal I/Q balance?
The TRF372017IRGZT requires differential AC-coupled baseband inputs (BBI_P/N and BBQ_P/N) with 100-Ω termination when internal VCM is used. Input impedance is fixed at 5 kΩ || 3 pF per pin, and the 8-bit programmable DC offset D/A enables fine-tuning of I/Q common-mode and differential offsets to achieve <0.5° phase and <0.1-dB gain matching-critical for <–40 dBc carrier suppression.
Can the TRF372017IRGZT generate LO frequencies below 300 MHz?
No, the TRF372017IRGZT's VCO operates from 2.4–4.8 GHz, and its integrated dividers (÷1/÷2/÷4/÷8) yield minimum LO output of 300 MHz (4.8 GHz ÷16 is not supported). For sub-300 MHz LO generation, an external divider or separate synthesizer is required-TI documentation confirms 300 MHz as the absolute lower bound for LO_OUT functionality in all operating modes.
TRF372017IRGZT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Upconverter
- LO Frequency:
- 300MHz ~ 4.8GHz
- RF Frequency:
- 300MHz ~ 4.8GHz
- P1dB:
- 12dBm
- Noise Floor:
- -153dBm/Hz
- Output Power:
- 3dBm
- Current - Supply:
- 200 mA
- Voltage - Supply:
- 3V ~ 3.6V, 4.5V ~ 5.5V
- Test Frequency:
- 2.7GHz
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
TRF372017IRGZT FAQ
1.How can I place an order for TRF372017IRGZT through Aetrix?
Please submit a Request for Quotation (RFQ) for TRF372017IRGZT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TRF372017IRGZT reliable?
The price and inventory of TRF372017IRGZT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TRF372017IRGZT is usually 5 days.
3.What payment methods are accepted for TRF372017IRGZT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TRF372017IRGZT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TRF372017IRGZT?
TRF372017IRGZT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TRF372017IRGZT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TRF372017IRGZT?
For technical support, including TRF372017IRGZT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TRF372017IRGZT requirements.
6.How does Aetrix verify that TRF372017IRGZT is sourced from the original manufacturer or authorized distributors?
All TRF372017IRGZT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TRF372017IRGZT meets industry standards.
7.What is the process for return or replacement of TRF372017IRGZT?
All TRF372017IRGZT units undergo pre-shipment inspection (PSI). If there is an issue with TRF372017IRGZT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TRF372017IRGZT part is unused and in its original packaging.
Return procedure for TRF372017IRGZT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TRF372017IRGZT Tags

-
LTC5599IUF#TRPBF
Analog Devices Inc.

-
LTC5599IUF#PBF
Analog Devices Inc.

-
LTC5589IUF#PBF
Analog Devices Inc.

-
ADL5375-05ACPZ-R7
Analog Devices Inc.

-
ADL5385ACPZ-R7
Analog Devices Inc.

-
AD8346ARUZ-REEL7
Analog Devices Inc.

-
LTC5588IPF-1#PBF
Analog Devices Inc.

-
ADRF6755ACPZ-R7
Analog Devices Inc.

-
TRF370417IRGET
Texas Instruments

-
HMC631LP3ETR
Analog Devices Inc.

-
TRF3705IRGET
Texas Instruments

-
LTC5589IUF#TRPBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

