Texas Instruments TS3V713ELRTGR

Overview

TS3V713ELRTGR from Texas Instruments is a 7-channel, 1:2 VGA video multiplexer/demultiplexer with integrated level shifters and clamping NMOS switches. It supports R/G/B/HSYNC/VSYNC/DDC_CLK/DDC_DAT signals, delivers 1.3 GHz bandwidth (–3 dB), 4 Ω typical RON for RGB channels, and operates at VDD = 3.3 V ±10% and VDD_5 = 5 V ±10%. It is used in notebook computers and docking stations to route VGA signals between one source and two display endpoints without signal degradation.

For engineers reviewing the TS3V713ELRTGR datasheet, TS3V713ELRTGR pinout, TS3V713ELRTGR application, or TS3V713ELRTGR equivalent, key selection considerations include its dual-supply operation (3.3 V + 5 V), integrated HSYNC/VSYNC level shifting, SCL/SDA voltage clamping, ESD robustness (±2 kV contact), and QFN-32 package with exposed thermal pad tied to GND.

Technical Context

The TS3V713ELRTGR implements three distinct switching domains: (1) low-RON analog switches for R/G/B paths (4 Ω typ., 1.3 GHz BW); (2) level-shifting buffers for HSYNC/VSYNC translating between 3.3 V and 5 V logic; and (3) NMOS clamping switches for SCL/SDA lines limiting output to VDD – 1 V. All analog I/Os feature integrated ESD diodes to VDD and GND.

Control is managed via a single SEL pin enabling either output bank (Bank 1 or Bank 2). Propagation delay is ≤0.25 ns for RGB/SDA/SCL paths and ≤7 ns for HSYNC/VSYNC paths; output skew is ≤0.1 ns between RGB channels. The device requires both VDD (3.3 V) and VDD_5 (5 V) supplies and mandates GND connection of the exposed center pad.

Key Specifications

Pinout & Package

TS3V713ELRTGR uses a 32-pin WQFN (RTG) package with 5 mm × 5 mm body, 0.5 mm pitch, and an exposed thermal pad that must be soldered to GND for thermal and EMI performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar VGA video switching applications.

Compared with TS3V713ELRTGR, TS3V712ELRTGR lacks VSYNC support and thus cannot fully replace it in VGA applications requiring DPMS or EDID handshake, while PI3USB30532ZLEX targets digital protocols and offers no native VGA signal conditioning or DDC protection.

Availability

TS3V713ELRTGR is available at Aetrix Electronics and suitable for notebook computers, docking stations, and KVM switches requiring stable component supply, long-term industrial lifecycle support, and guaranteed RoHS-compliant WQFN packaging.

Supply support for TS3V713ELRTGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies with decades of leadership in interface and signal-path ICs.

The TS3V713ELRTGR belongs to TI's video interface switch product line, engineered specifically for high-fidelity analog video routing in portable and docked computing systems with integrated DDC signal conditioning.

FAQ

What is the function of the VDD_5 supply pin on the TS3V713ELRTGR?

The VDD_5 pin supplies 5 V to the integrated level-shifting buffers for HSYNC and VSYNC signals, enabling bidirectional voltage translation between 3.3 V GPU logic and 5 V monitor-side DDC circuitry. It is electrically isolated from the 3.3 V VDD rail powering the RGB switches and digital control logic. Proper decoupling (e.g., 0.1 µF ceramic) is required at the VDD_5 pin to maintain level-shifter stability. TS3V713ELRTGR will not operate correctly if VDD_5 is omitted or shorted to VDD.

Can the TS3V713ELRTGR support hot-plug detection via DDC when used in a docking station?

Yes, the TS3V713ELRTGR supports full DDC hot-plug detection by passing SDA0/SCL0 bidirectionally to either SDA1/SCL1 or SDA2/SCL2 with integrated clamping (output limited to VDD – 1 V) and ±2 kV IEC61000-4-2 ESD protection. This preserves I²C waveform integrity during cable insertion/removal. The TS3V713ELRTGR maintains DC coupling and low capacitance (<8.2 pF) on DDC lines, ensuring reliable EDID reads and monitor enumeration without external repeaters or translators.

What is the maximum recommended trace length for RGB signals routed through the TS3V713ELRTGR?

For optimal signal integrity at 1.3 GHz bandwidth, RGB traces should be impedance-controlled at 75 Ω with length ≤10 cm (4 inches) from TS3V713ELRTGR output pins to the VGA connector. Longer traces increase insertion loss and crosstalk risk; simulation or TDR validation is advised beyond this length. The TS3V713ELRTGR's 4 Ω RON and 8 pF CON minimize loading effects, but PCB layout remains critical-avoid vias near analog pins and use solid GND planes beneath the WQFN thermal pad.

Does the TS3V713ELRTGR require external pull-up resistors on SCL/SDA lines?

No, external pull-ups are not required on SCL/SDA lines driven by the TS3V713ELRTGR because its NMOS switches provide active clamping to VDD – 1 V and rely on the monitor-side or GPU-side pull-ups already present in standard VGA implementations. Adding external pull-ups may cause contention or violate the VDD – 1 V clamp limit. The TS3V713ELRTGR datasheet specifies that SCL/SDA pins are designed to interface directly with compliant I²C masters/slaves without additional biasing components.

How does the TS3V713ELRTGR handle simultaneous switching of multiple video channels?

TS3V713ELRTGR switches all seven channels (R/G/B/HSYNC/VSYNC/DDC_CLK/DDC_DAT) simultaneously under a single SEL control signal, with propagation delays matched to ≤0.1 ns skew between RGB paths and ≤7 ns for H/V paths. This ensures pixel-aligned timing across the entire VGA signal set. The device's monolithic construction and shared substrate eliminate inter-channel timing drift, making TS3V713ELRTGR suitable for high-resolution, flicker-free video routing where phase coherence is critical.