STMicroelectronics TS507ID
- Part No.:
- TS507ID
- Manufacturer:
- STMicroelectronics
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TS507ID.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,691
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Product details
Overview
TS507ID from STMicroelectronics is a high-precision rail-to-rail input/output operational amplifier optimized for automotive and industrial signal conditioning. It delivers 25 µV typical offset voltage, 1.9 MHz gain-bandwidth product, and operates from 2.7 V to 5.5 V supply with 0.8 mA quiescent current - enabling accurate low-voltage sensor interfacing in battery-powered medical instrumentation.
For engineers reviewing the TS507ID datasheet, TS507ID pinout, TS507ID application, or TS507ID equivalent, key selection considerations include ultra-low offset drift (1 µV/°C), rail-to-rail output swing into 600 Ω, 45° phase margin with 100 pF load, latchup immunity, and AEC-Q100 qualification for automotive use.
Technical Context
The TS507ID employs proprietary trimming to achieve 25 µV typ input offset without external nulling, maintaining stability across its full 2.7–5.5 V supply range. Its internal architecture supports rail-to-rail input common-mode range (VDD to VCC) and output swing within 120 mV of rails at 600 Ω load.
It features 131 dB large-signal voltage gain, 105 dB PSRR, and 115 dB CMRR - ensuring high DC accuracy and noise rejection in precision analog front-ends. The device sustains 45° phase margin with 100 pF capacitive load, validated for stable operation in unity-gain follower and closed-loop configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input offset voltage | 25 µV typ (max 100 µV) - enables sub-mV error in 12-bit+ data acquisition systems |
| Supply voltage range | 2.7 V to 5.5 V - compatible with single-cell Li-ion, 3.3 V, and 5 V logic domains |
| Gain-bandwidth product | 1.9 MHz - supports bandwidth-critical sensor amplification up to ~150 kHz closed-loop |
| Slew rate | 0.6 V/µs - sufficient for 1 Vpp signals at ≤100 kHz without distortion |
| Quiescent current | 0.8 mA at 2.7 V - extends battery life in portable medical devices |
| Phase margin | 45° with 100 pF load - ensures stable unity-gain operation driving ADC input capacitors |
| ESD protection | 5 kV HBM - robust handling during PCB assembly and field service |
Pinout & Package
TS507ID is housed in a space-saving SOT23-5 micropackage (2.8 mm × 2.9 mm footprint) with exposed pad for thermal performance. Pin numbering follows standard top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VDD | Negative supply rail (typically ground); referenced for input common-mode and output swing |
| 2 | Inverting input (−) | Differential input node; accepts rail-to-rail common-mode voltage (VDD to VCC) |
| 3 | Non-inverting input (+) | Differential input node; identical common-mode range as pin 2 |
| 4 | Output | Rail-to-rail output capable of sourcing/sinking ≥70 mA (at 5 V, 25 °C) |
| 5 | VCC | Positive supply rail; defines upper limit of input/output voltage range |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low offset voltage | 25 µV typ (100 µV max) - eliminates need for external zeroing circuitry in precision transducer interfaces |
| Rail-to-rail I/O | Input common-mode: VDD to VCC; output swing: within 120 mV of rails at 600 Ω - maximizes dynamic range in low-voltage systems |
| Automotive qualification | AEC-Q100 Grade 1 (−40 °C to +125 °C) - certified for engine control, body electronics, and ADAS sensor signal chains |
| Latchup immunity | Class A per JEDEC JESD78 - prevents destructive latchup under transient overvoltage or ESD stress |
| Stable with capacitive loads | 45° phase margin with 100 pF - simplifies design when driving long traces or ADC input capacitance without external compensation |
Applications
| Battery-Powered Medical Sensors | Automotive Cabin Pressure Monitoring |
|---|---|
Use Scenario: Amplifying microvolt-level output from piezoresistive pressure sensors in portable ECG or spirometry devices. IC Role / Device Role / Timing Role: Precision DC-coupled signal conditioner with rail-to-rail output driving 12-bit SAR ADC inputs. Use Value: 25 µV offset ensures <0.1% gain error at 25 mV full-scale; 0.8 mA ICC extends 24-hour runtime on coin-cell batteries. | Use Scenario: Signal conditioning for MEMS barometric pressure sensors in HVAC control modules. IC Role / Device Role / Timing Role: Low-drift buffer and level-shifter interfacing sensor bridge to CAN transceiver analog monitoring inputs. Use Value: 1 µV/°C drift maintains calibration over −40 °C to +85 °C ambient; AEC-Q100 qualification ensures reliability in vehicle lifetime. |
| Industrial Process Transmitter | Portable Diagnostic Equipment |
Use Scenario: Amplifying 4–20 mA loop-powered sensor outputs in smart field instruments. IC Role / Device Role / Timing Role: High-PSRR (105 dB) input stage rejecting power supply noise in 2-wire loop designs. Use Value: 105 dB PSRR suppresses ripple-induced errors in 24 V loop supplies; rail-to-rail output drives 0–5 V ADC references directly. | Use Scenario: Front-end gain stage for ultrasound Doppler signal paths in handheld imaging units. IC Role / Device Role / Timing Role: Low-noise (12 nV/√Hz), low-distortion (0.0003 % THD+N) amplifier in analog beamforming chain. Use Value: 12 nV/√Hz input noise preserves SNR in weak-signal detection; 0.6 V/µs slew rate supports 100 kHz baseband bandwidth. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision rail-to-rail op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA333AIDBVR | Zero-drift architecture; 0.1 µV/°C offset drift vs. TS507ID's 1 µV/°C; higher 350 kHz GBW but lower 50 mA output drive | Better for µV-level DC stability over temperature; less suitable for driving heavy capacitive loads or low-Z ADCs | Choose OPA333AIDBVR when long-term DC drift dominates; choose TS507ID when output drive, phase margin, and automotive qualification are critical |
| AD8628ARJZ-R7 | Chopper-stabilized; 1 µV max offset; 2.5 MHz GBW; higher 1.2 mA ICC; no AEC-Q100 rating | Superior offset spec but higher power and no automotive qualification; limited to commercial/industrial temp range | Choose AD8628ARJZ-R7 for lab-grade instrumentation where absolute offset is paramount; TS507ID preferred for production automotive or harsh-environment deployment |
Compared with OPA333AIDBVR and AD8628ARJZ-R7, the TS507ID uniquely balances ultra-low offset (25 µV typ), robust 45° phase margin with 100 pF, AEC-Q100 Grade 1 qualification, and 70+ mA output drive - making it the only option qualified for safety-critical automotive sensor signal chains requiring both precision and ruggedness.
Availability
TS507ID is available at Aetrix Electronics and suitable for battery-powered medical devices, automotive cabin sensor modules, and industrial process transmitters requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for TS507ID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in automotive, industrial, and power management ICs with strong analog and mixed-signal IP.
The TS507ID belongs to ST's precision op-amp product line, engineered specifically for high-accuracy, low-power signal conditioning in automotive and industrial environments where offset, drift, and reliability are mission-critical.
FAQ
What is the maximum capacitive load the TS507ID can drive while maintaining stability?
The TS507ID maintains 45° phase margin with 100 pF capacitive load in unity-gain configuration, as verified in the datasheet (Figure 20). For loads >100 pF, external compensation (e.g., out-of-the-loop resistor per AN2653) is required to avoid oscillation - no internal compensation is provided for larger loads.
Does the TS507ID support dual-supply operation?
No. The TS507ID is specified for single-supply operation from 2.7 V to 5.5 V between VCC (positive rail) and VDD (negative rail, typically ground). It does not support split supplies; its input common-mode range is VDD to VCC, and output swing is referenced to those rails.
Is the TS507ID pin-compatible with other SOT23-5 op-amps like the TS912 or LMV358?
No. TS507ID uses non-standard pinout: VDD (1), Inverting Input (2), Non-inverting Input (3), Output (4), VCC (5). This differs from industry-standard SOT23-5 op-amps (e.g., LMV358: V−, OUT, IN+, IN−, V+), requiring PCB layout revision for replacement.
What is the guaranteed input offset voltage over temperature for the TS507ID Industrial grade?
For the TS507I variant (Industrial grade, −40 °C to +125 °C), input offset voltage is guaranteed ≤400 µV max across temperature, with typical drift of 1 µV/°C. This is confirmed in Table 3 (full temperature range row) of the datasheet under VCC = 5 V conditions.
TS507ID Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.6V/µs
- Gain Bandwidth Product:
- 1.9 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 8 nA
- Voltage - Input Offset:
- 25 µV
- Current - Supply:
- 850µA
- Current - Output / Channel:
- 128 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TS507ID FAQ
1.How can I place an order for TS507ID through Aetrix?
Please submit a Request for Quotation (RFQ) for TS507ID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TS507ID reliable?
The price and inventory of TS507ID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TS507ID is usually 5 days.
3.What payment methods are accepted for TS507ID?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TS507ID transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TS507ID?
TS507ID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TS507ID order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TS507ID?
For technical support, including TS507ID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TS507ID requirements.
6.How does Aetrix verify that TS507ID is sourced from the original manufacturer or authorized distributors?
All TS507ID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TS507ID meets industry standards.
7.What is the process for return or replacement of TS507ID?
All TS507ID units undergo pre-shipment inspection (PSI). If there is an issue with TS507ID, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TS507ID part is unused and in its original packaging.
Return procedure for TS507ID:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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