Texas Instruments TS5N118PWR
- Part No.:
- TS5N118PWR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TS5N118PWR.pdf
- Description:
- IC MUX/DEMUX 1 X 8:1 16TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:18,000
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Product details
Overview
TS5N118PWR from Texas Instruments is a 1-of-8 FET multiplexer/demultiplexer bus switch optimized for high-bandwidth digital and analog signal routing. It features 3 Ω typical ON-state resistance (ron), 25 MHz bandwidth, bidirectional rail-to-rail switching (0–10 V), and operates from 4.75 V to 5.25 V. It enables low-distortion data path selection in PCI interfaces and memory interleaving systems.
For engineers reviewing the TS5N118PWR datasheet, TS5N118PWR pinout, TS5N118PWR application, or TS5N118PWR equivalent, key selection criteria include its 3 Ω ron flatness over voltage range, 20 pF max OFF-state I/O capacitance, Ioff partial-power-down protection, and TSSOP-16 (PW) package compatibility with high-density PCB layouts.
Technical Context
The TS5N118PWR implements an 8-channel FET-based analog/digital switch architecture with integrated charge pump to maintain low and flat ON-resistance across the full 0–10 V I/O swing. Its internal enable logic responds to OE, S0, S1, and S2 inputs to route A port bidirectionally to one of eight B ports (B1–B8).
It supports partial-power-down operation via Ioff circuitry that blocks reverse current flow when VCC = 0 V, ensuring bus isolation during power sequencing. The device meets JESD 78 Class II latch-up immunity (>100 mA) and JESD 22 ESD ratings (2000-V HBM, 1000-V CDM).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 4.75 V to 5.25 V - Ensures stable operation within standard 5-V TTL/PCI supply rails. |
| ron (Typ) | 3 Ω at VCC = 5 V, IO = ±50 mA - Enables minimal voltage drop and near-zero propagation delay (<0.1 ns) in high-speed data paths. |
| Bandwidth | 25 MHz - Supports broadband signal integrity up to video-rate and mid-speed serial data rates. |
| Cio(OFF) | 20 pF max (B port) - Reduces capacitive loading on inactive channels to prevent crosstalk and signal distortion. |
| VI/O Range | 0 V to 10 V - Allows seamless routing of both digital logic and analog signals without level shifting. |
| Ioff Protection | Active at VCC = 0 V - Prevents damaging backflow current during hot-insertion or power-down sequencing. |
| OFF Isolation | –50 dB at 25 MHz - Maintains channel separation critical for multi-source bus architectures. |
Pinout & Package
TSSOP-16 (PW) package: 4.4 mm × 5.0 mm body, 0.65 mm pitch, 1.2 mm max height, JEDEC MO-153 compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Common I/O port | Bidirectional data terminal connected to selected Bx port when enabled; high-impedance when OE = high. |
| B1–B8 | Channel I/O ports | Eight independent bidirectional data terminals; only one connected to A at any time per select code. |
| S0, S1, S2 | Binary address inputs | 3-bit select lines determining which B port (B1–B8) connects to A (L = 0, H = 1). |
| OE | Output-enable control | Active-low enable: OE = L enables switching; OE = H forces all channels into high-Z isolation. |
| VCC | Power supply | 5-V core supply powering internal charge pump and logic; must be present for functional operation. |
| GND | Ground reference | Return path for all I/O and internal circuitry; required for proper ron and leakage performance. |
| NC | No internal connection | Pin 1 (top-left corner, marked "NC") is unconnected - must not be tied to any net. |
Key Features
| Feature | Design Value |
|---|---|
| Charge-pump gate drive | Maintains flat 3 Ω ron across full 0–10 V I/O range, eliminating signal-dependent distortion in analog/digital mixed-signal paths. |
| Ioff partial-power-down | Blocks reverse current flow when VCC = 0 V, enabling safe hot-swap and power-gating in modular systems. |
| Low Cio(OFF) = 20 pF | Minimizes capacitive coupling between inactive channels, achieving –50 dB OFF isolation at 25 MHz for noise-sensitive applications. |
| Bidirectional zero-delay routing | Supports true bidirectional data flow (A ↔ Bx) with <0.1 ns propagation delay - ideal for memory-mapped I/O and mirrored bus topologies. |
| PCI interface compliance | Meets timing, voltage, and noise requirements for PCI Local Bus Rev 2.2 signal routing without external buffering. |
Applications
| PCI Bus Expansion Slot Interface | Memory Interleaving Controller |
|---|---|
Use Scenario: Routing address/data lines between CPU and multiple PCI add-in cards in embedded industrial controllers. IC Role / Device Role / Timing Role: 1-of-8 demultiplexer selecting active card slot while isolating unused lanes to reduce bus loading and crosstalk. Use Value: 3 Ω ron and 20 pF Cio(OFF) preserve signal edge rate and minimize reflections across 33 MHz PCI clock domain. | Use Scenario: Dynamically steering memory read/write requests between dual SDRAM banks in real-time DSP systems. IC Role / Device Role / Timing Role: High-bandwidth analog switch enabling low-latency, bidirectional data path selection between memory controller and bank-specific data buses. Use Value: <0.1 ns tpd and rail-to-rail 0–10 V support eliminate timing skew and level-shifting overhead in burst-mode transfers. |
| Differential Signal Multiplexing | Bus Isolation for Hot-Swap Modules |
Use Scenario: Selecting between multiple LVDS or RS-422 transceiver pairs in telecom line-card backplanes. IC Role / Device Role / Timing Role: Low-distortion signal gate preserving differential pair integrity and common-mode rejection during channel switching. Use Value: –50 dB OFF isolation and flat ron ensure minimal amplitude imbalance and phase error across 25 MHz bandwidth. | Use Scenario: Isolating peripheral modules (e.g., USB, CAN) during live insertion/removal in ruggedized vehicle ECUs. IC Role / Device Role / Timing Role: Ioff-enabled bus switch providing galvanic isolation and backfeed prevention when module VCC is unpowered. Use Value: Ioff protection and >100 mA latch-up immunity meet automotive ISO 16750-2 pulse test requirements for robust hot-swap operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 1-of-8 analog/digital multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT16212DGGR | 12-bit FET bus switch, no select logic; requires external decoder; ron = 4 Ω, Cio(OFF) = 12 pF. | Fixed 12-channel routing only; lacks integrated S0/S1/S2 decoding; better for parallel bus gating than dynamic channel selection. | Choose when needing higher channel count and lower capacitance, but willing to add external logic for address decoding. |
| MAX4581ESE+ | CMOS analog multiplexer, 5-V single supply, ron = 100 Ω, bandwidth = 35 MHz, no Ioff. | Higher ron limits current drive; no partial-power-down protection; suited for low-power signal routing, not bus switching. | Choose for ultra-low quiescent current in battery-powered instrumentation where 3 Ω ron and Ioff are noncritical. |
Compared with SN74CBT16212DGGR and MAX4581ESE+, the TS5N118PWR uniquely integrates 3-bit decode logic, sub-5 Ω ron, Ioff protection, and 25 MHz bandwidth in a single TSSOP-16 package - making it optimal for space-constrained, high-fidelity PCI and memory-interleaving designs requiring zero-layout rework.
Availability
TS5N118PWR is available at Aetrix Electronics and suitable for PCI interface design, memory interleaving systems, differential signal routing, and hot-swap module isolation requiring stable component supply and long-term industrial lifecycle support.
Supply support for TS5N118PWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 90 years of innovation in high-reliability components.
The TS5N118PWR belongs to TI's high-bandwidth bus switch product line, engineered specifically for low-distortion, rail-to-rail signal routing in PCI, memory, and communications infrastructure where timing fidelity and power sequencing robustness are critical.
FAQ
What is the maximum signal voltage range supported by the TS5N118PWR?
The TS5N118PWR supports a 0 V to 10 V data I/O voltage range (VI/O) across its A and B ports. This rail-to-rail capability allows the TS5N118PWR to handle both standard 5-V digital logic and analog signals without attenuation or clipping, provided VCC remains within its 4.75 V to 5.25 V operating range.
Does the TS5N118PWR support partial-power-down operation?
Yes, the TS5N118PWR includes Ioff circuitry that actively disables current flow when VCC = 0 V. This feature prevents damaging backflow current through the TS5N118PWR during power sequencing or hot-swap events, ensuring safe isolation between powered and unpowered subsystems in modular designs.
What is the typical ON-state resistance of the TS5N118PWR and how does it vary?
The TS5N118PWR has a typical ON-state resistance (ron) of 3 Ω at VCC = 5 V and ±50 mA load. Per Figure 1 in the datasheet, ron remains flat across the full 0–10 V I/O voltage range due to its internal charge-pump gate drive - a key differentiator of the TS5N118PWR versus conventional analog switches.
Can the TS5N118PWR be used for bidirectional signal routing?
Yes, the TS5N118PWR supports fully bidirectional data flow between its A port and any selected B port (B1–B8). There is no inherent directionality - signals pass equally well from A to Bx or Bx to A, with near-zero propagation delay (<0.1 ns) and symmetric ron in both directions, as confirmed in the TS5N118PWR functional description and logic diagram.
What package type is used for the TS5N118PWR and what are its key mechanical dimensions?
The TS5N118PWR uses a TSSOP-16 (PW) package: 4.4 mm × 5.0 mm body size, 0.65 mm lead pitch, 1.2 mm maximum height, and JEDEC MO-153 compliant. Its compact footprint and gull-wing leads support fine-pitch automated assembly and high-density PCB layouts typical in networking and industrial control modules.
TS5N118PWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Multiplexer/Demultiplexer
- Circuit:
- 1 x 8:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
TS5N118PWR FAQ
1.How can I place an order for TS5N118PWR through Aetrix?
Please submit a Request for Quotation (RFQ) for TS5N118PWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TS5N118PWR reliable?
The price and inventory of TS5N118PWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TS5N118PWR is usually 5 days.
3.What payment methods are accepted for TS5N118PWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TS5N118PWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TS5N118PWR?
TS5N118PWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TS5N118PWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TS5N118PWR?
For technical support, including TS5N118PWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TS5N118PWR requirements.
6.How does Aetrix verify that TS5N118PWR is sourced from the original manufacturer or authorized distributors?
All TS5N118PWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TS5N118PWR meets industry standards.
7.What is the process for return or replacement of TS5N118PWR?
All TS5N118PWR units undergo pre-shipment inspection (PSI). If there is an issue with TS5N118PWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TS5N118PWR part is unused and in its original packaging.
Return procedure for TS5N118PWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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