STMicroelectronics TS652IDT

Overview

TS652IDT from STMicroelectronics is a dual-channel differential digitally controlled variable gain amplifier (VGA) with 4-bit programmable gain from –9 dB to +30 dB in 3 dB steps, 90 V/µs slew rate, 52 MHz small-signal bandwidth at +18 dB gain, and 4.6 nV/√Hz input voltage noise. It integrates independent gain control logic, power-down mode (150 µA quiescent), and rail-to-rail output drive into a SO-14 package for ADSL preamplifier applications.

For engineers reviewing the TS652IDT datasheet, TS652IDT pinout, TS652IDT application, or TS652IDT equivalent, this page delivers verified specifications including gain monotonicity, channel-matched bandwidth roll-off, input-referred noise vs. gain, power-down isolation (>90 dB at 1 MHz), and dual-supply/single-supply biasing constraints for telecom signal chain design.

Technical Context

The TS652IDT implements a two-stage per-channel architecture: a low-noise first stage (0–18 dB gain) optimized for source impedances <3 kΩ, followed by a second stage offering ±9 dB attenuation or +12 dB gain with 500 Ω load drive capability. Gain is set via CMOS-compatible 4-bit parallel inputs (GC1–GC4), with monotonicity guaranteed across all 16 codes.

It supports dual ±6 V or single +12 V operation using internal bias networks; AGND must be tied to VCC/2 in single-supply mode. Power-down mode disables both channels simultaneously, reducing supply current to 150 µA and raising output impedance to 100–150 kΩ || 5 pF while maintaining >90 dB input-output isolation up to 10 MHz.

Key Specifications

Pinout & Package

TS652IDT is housed in a 14-pin plastic micropackage (SO-14) with standard SOIC footprint (8.75 mm × 6.2 mm × 1.75 mm). Pin 1 is marked by a notch or dot; top-view orientation follows JEDEC MS-012.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar differential VGA applications.

Compared with AD8370ARUZ and LMH6514MMX, TS652IDT uniquely combines dual-channel matching, guaranteed monotonic 4-bit digital control, integrated power-down, and telecom-optimized noise/bandwidth trade-offs - making it purpose-built for ADSL/VDSL line card integration where channel correlation and low standby power are mandatory.

Availability

TS652IDT is available at Aetrix Electronics and suitable for ADSL/VDSL line card manufacturing, telecom baseband receiver development, and multi-carrier signal conditioning requiring stable component supply and long-term obsolescence mitigation support.

Supply support for TS652IDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in analog, power, microcontrollers, and automotive ICs with over 40 years of industrial-grade reliability.

The TS652 belongs to ST's high-performance analog signal conditioning portfolio, designed specifically for broadband telecommunications infrastructure requiring precise, low-noise, digitally programmable gain in space-constrained DSL line cards.

FAQ

What is the maximum input signal level for TS652IDT at ±6 V supply?

At ±6 V supply, the maximum input signal swing is ±4.5 V peak (–V_CC + 1.5 V to +V_CC – 1.5 V), limited by the common-mode input range of the first-stage amplifiers. Exceeding this causes clipping and increased THD. For 1 V_PP signals at +9 dB gain, the device maintains <0.01% THD up to 150 kHz.

How does power-down mode affect output impedance and isolation?

In power-down mode, TS652IDT raises output impedance to 100–150 kΩ in parallel with 5 pF and achieves >90 dB input-to-output isolation up to 10 MHz. This prevents signal leakage between active and powered-down channels in multi-line DSLAM systems, eliminating crosstalk without requiring external switches.

Can TS652IDT operate from a single +12 V supply?

Yes - TS652IDT supports single +12 V operation using internal biasing. AGND (Pin 9) must be connected to +6 V (V_CC/2), and a resistor divider (e.g., two 7.5 kΩ resistors) supplies 8 µA bias current to each inverting input. AC coupling capacitors (≥1 µF) are required at inputs to block DC offset.

Is gain monotonicity guaranteed across temperature and process variation?

Yes - gain monotonicity is guaranteed over the full operating temperature range (–40 °C to +85 °C) and across process corners, as confirmed in the datasheet's "Gain monotonicity guaranteed by design" statement and validated in production testing. No code produces lower output than the preceding code, even at temperature extremes.