STMicroelectronics TSH74CDT
- Part No.:
- TSH74CDT
- Manufacturer:
- STMicroelectronics
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TSH74CDT.pdf
- Description:
- IC OPAMP GP 4 CIRCUIT 14SO
- Quantity:
- Payment:

- Shipping:

Inventory:4,776
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Product details
Overview
TSH74CDT from STMicroelectronics is a quad rail-to-rail operational amplifier optimized for high-speed video and ADC driver applications, featuring 90 MHz bandwidth, 100 V/µs slew rate (at 5 V), 55 mA output current, and operation from 3 V to ±5 V supplies. It drives 150 Ω loads with low distortion (THD = 0.1 %) and is packaged in SO14.
For engineers reviewing the TSH74CDT datasheet, TSH74CDT pinout, TSH74CDT application, or TSH74CDT equivalent, key selection criteria include its quad-channel architecture with dual standby control pins, video-grade differential gain (0.5 %) and phase (0.5 °), rail-to-rail output swing, and compatibility with 75 Ω video line driving per channel.
Technical Context
The TSH74 is a quad op-amp with independent input and output stages per channel, configured for unity-gain stable operation into 150 Ω loads. Its internal architecture supports single-supply (3–12 V) or split-supply (±5 V) operation, with common-mode input range extending to VCC− − 1.1 V and rail-to-rail output swing.
Two dedicated standby pins (pins 8 and 9) enable simultaneous or selective shutdown of all four amplifiers, reducing quiescent current to 20–55 µA per channel while maintaining high-output impedance (>10 MΩ). Standby activation occurs within 2 µs, and recovery to full operation takes ≤10 µs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Bandwidth @ −3 dB | 90 MHz - Enables full HD video signal amplification up to 1080p/60 without attenuation |
| Slew Rate | 100 V/µs (typ. at 5 V) - Supports fast transient response for composite video sync pulses and sharp-edged ADC sampling clocks |
| Output Current | ±55 mA - Drives standard 75 Ω coaxial video lines and multiple parallel 150 Ω loads simultaneously |
| Total Harmonic Distortion | 0.1 % (at 4 MHz, 2 Vpp) - Meets broadcast-grade video fidelity requirements for Y/C and RGB signals |
| Differential Gain / Phase | 0.5 % / 0.5 ° - Preserves color accuracy and timing integrity in analog video transmission paths |
| Supply Range | 3 V to 12 V single or ±5 V dual - Compatible with portable battery-powered systems and industrial 5 V/±5 V rails |
| Quiescent Current | 10.5 mA per channel (typ. at 5 V) - Balances performance and power efficiency in multi-channel video front-ends |
Pinout & Package
Package: SO14 (Small Outline, 14-pin, 150 mil width, JEDEC MS-012).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Non-inverting Input (Ch1) | Positive input node for first op-amp; accepts DC-coupled or AC-coupled video/ADC signals |
| 2 | Inverting Input (Ch1) | Negative feedback node for Ch1; used for gain-setting and stability compensation |
| 3 | Output (Ch1) | Low-impedance rail-to-rail output capable of sourcing/sinking 55 mA into 150 Ω |
| 4 | VCC− (GND for single supply) | Power reference for all four amplifiers; connects to system ground or negative rail |
| 5 | Non-inverting Input (Ch2) | Positive input for second op-amp; electrically isolated from Ch1 for crosstalk-sensitive routing |
| 6 | Inverting Input (Ch2) | Negative input for Ch2; supports independent feedback network placement |
| 7 | Output (Ch2) | Second independent output; matches Ch1 performance for dual-video or stereo ADC buffering |
| 8 | Standby Control (Ch1–Ch2) | Active-low logic input; pulls to VCC− to disable Ch1 & Ch2, reducing ICC to 20–55 µA |
| 9 | Standby Control (Ch3–Ch4) | Active-low logic input; pulls to VCC− to disable Ch3 & Ch4 independently of Ch1–Ch2 |
| 10 | Output (Ch3) | Third rail-to-rail output; identical specs to Ch1/Ch2 for triple-channel video or sensor interfaces |
| 11 | Inverting Input (Ch3) | Negative input for Ch3; layout isolation critical to maintain >65 dB channel separation at 10 MHz |
| 12 | Non-inverting Input (Ch3) | Positive input for Ch3; supports biasing for DC-coupled CCD or CMOS image sensor outputs |
| 13 | Output (Ch4) | Fourth output; enables full quad-buffering for RGB+sync, 4-channel ADC, or multi-lane video |
| 14 | VCC+ | Positive supply rail; accepts 3–12 V or +5 V in split-supply configurations |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output swing | Drives to within 30 mV of VCC+ and 40 mV of VCC− at 150 Ω load, enabling full dynamic range utilization in 3 V systems |
| Dual independent standby controls | Pins 8 and 9 allow grouped shutdown of Ch1–Ch2 and Ch3–Ch4 separately, supporting dynamic power gating in multi-function video SoCs |
| 75 Ω video line drive capability | Specified for 150 Ω loads but validated for 75 Ω coaxial cable driving with <0.5 % differential gain error and <0.5 ° phase shift |
| Low inter-channel crosstalk | 65 dB minimum channel separation from 1–10 MHz ensures minimal interference between RGB or YUV signal paths |
| Single-supply operation down to 3 V | Enables direct integration into battery-powered portable video recorders and handheld test equipment without level-shifting circuitry |
Applications
| RGB Video Signal Buffering | Quad-Channel ADC Driver |
|---|---|
Use Scenario: Driving RGB analog outputs from an image processor to three separate 75 Ω coaxial cables plus sync signal. IC Role / Device Role / Timing Role: Quad op-amp providing matched gain, phase, and drive strength across R/G/B/sync channels with <0.5 ° inter-channel skew. Use Value: Eliminates need for four discrete op-amps, reduces PCB area by 40 %, and guarantees <0.5 % differential gain matching across all channels. | Use Scenario: Conditioning four simultaneous analog sensor outputs (e.g., temperature, pressure, voltage, current) before multiplexed ADC sampling. IC Role / Device Role / Timing Role: Quad buffer isolating sensors from ADC input capacitance while maintaining <10 ns group delay variation across channels. Use Value: Enables synchronized 4-channel acquisition with <1 LSB gain error and no channel-to-channel timing skew affecting FFT coherence. |
| STB Set-Top Box Video Output | Portable Medical Imaging Front-End |
Use Scenario: Driving composite video (CVBS), S-video (Y/C), and component (YPbPr) outputs from a single SoC in consumer STB designs. IC Role / Device Role / Timing Role: Quad op-amp delivering broadcast-compliant video performance (SMPTE RP-168) across all three analog video standards. Use Value: Reduces BOM count by consolidating three video drivers into one SO14 package, cutting assembly cost and improving thermal uniformity. | Use Scenario: Amplifying and conditioning four low-noise analog outputs from ultrasound transducer arrays in handheld diagnostic devices. IC Role / Device Role / Timing Role: Low-noise (11 nV/√Hz), high-bandwidth buffer preserving signal integrity from 10 kHz to 10 MHz for time-of-flight measurements. Use Value: Achieves <65 dB SNR at 5 MHz while operating from 3.3 V battery supply, extending device runtime without sacrificing imaging resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad high-speed op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMH6644MA/NOPB | Higher GBW (150 MHz), no standby function, SO14 package, higher ICC (12.5 mA/ch) | Optimized for RF/IF signal chains; lacks video-specific THD/DG/DP specs | Select when >100 MHz bandwidth is required and power gating is unnecessary |
| ADA4857-4ARUZ | Lower noise (4.5 nV/√Hz), lower slew rate (75 V/µs), TSSOP-14, no standby pins | Better suited for precision instrumentation than video; not characterized for 75 Ω loads | Prefer for low-noise sensor signal conditioning where video fidelity metrics are irrelevant |
Compared with LMH6644MA/NOPB and ADA4857-4ARUZ, the TSH74CDT uniquely combines video-grade distortion performance (0.1 % THD), dual standby control, and guaranteed 150 Ω drive capability - making it irreplaceable in cost-sensitive, power-aware, broadcast-compliant video systems.
Availability
TSH74CDT is available at Aetrix Electronics and suitable for RGB video buffering, quad ADC driving, set-top box analog outputs, and portable medical imaging front-ends requiring stable component supply and long-term production continuity.
Supply support for TSH74CDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and MEMS sensors for automotive, industrial, and consumer markets.
The TSH7x series was developed specifically for high-fidelity analog video signal processing and high-speed data acquisition, targeting applications where bandwidth, low distortion, rail-to-rail output, and flexible power management are co-critical.
FAQ
What is the maximum capacitive load the TSH74CDT can drive while maintaining stability?
The TSH74CDT is specified for stable operation with up to 30 pF in parallel with a 150 Ω load at AVCL = +2, as verified in Figure 3 of the datasheet. Driving >30 pF requires external isolation resistance (≥49.9 Ω) in series with the output to prevent peaking or oscillation, especially in PCB traces longer than 2 inches.
Can the TSH74CDT operate from a 3.3 V single supply?
Yes - the TSH74CDT is fully specified from 3 V to 12 V single supply or ±5 V dual supply. At 3.3 V, it delivers 87 MHz bandwidth, 45 V/µs slew rate (CL = 5 pF), and rail-to-rail output swing from 30 mV above GND to 30 mV below VCC, meeting requirements for low-voltage portable video systems.
How does the standby function affect output impedance and signal routing?
When either standby pin (8 or 9) is pulled low, the corresponding pair of amplifiers enters high-impedance state with output impedance >10 MΩ (Rout) in parallel with 17 pF (Cout). This allows safe connection to shared buses or multiplexed video paths without loading active channels or causing signal contention.
Is the TSH74CDT pin-compatible with other TSH7x variants in SO14?
No - only the TSH73 (SO14/TSSOP14) and TSH74 (SO14/TSSOP14) share the same 14-pin SO package footprint, but their pinouts differ: TSH73 has three standalone standby pins (1, 2, 3), while TSH74 uses dual grouped standby (pins 8 and 9). Direct substitution requires PCB redesign.
TSH74CDT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 4
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 118V/µs
- Gain Bandwidth Product:
- 65 MHz
- -3db Bandwidth:
- 100 MHz
- Current - Input Bias:
- 6 µA
- Voltage - Input Offset:
- 1.1 mV
- Current - Supply:
- 8.2mA
- Current - Output / Channel:
- 55 mA
- Voltage - Supply Span (Min):
- 3 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SO
TSH74CDT FAQ
1.How can I place an order for TSH74CDT through Aetrix?
Please submit a Request for Quotation (RFQ) for TSH74CDT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSH74CDT reliable?
The price and inventory of TSH74CDT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSH74CDT is usually 5 days.
3.What payment methods are accepted for TSH74CDT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSH74CDT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSH74CDT?
TSH74CDT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSH74CDT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSH74CDT?
For technical support, including TSH74CDT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSH74CDT requirements.
6.How does Aetrix verify that TSH74CDT is sourced from the original manufacturer or authorized distributors?
All TSH74CDT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSH74CDT meets industry standards.
7.What is the process for return or replacement of TSH74CDT?
All TSH74CDT units undergo pre-shipment inspection (PSI). If there is an issue with TSH74CDT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSH74CDT part is unused and in its original packaging.
Return procedure for TSH74CDT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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