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Renesas TSI350A-66CQ
- Part No.:
- TSI350A-66CQ
- Manufacturer:
- Renesas
- Category:
- Specialized
- Package:
- 208-BFQFP
- Datasheet:
-
TSI350A-66CQ.pdf
- Description:
- IC INTERFACE SPECIALIZED 208QFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,882
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Product details
Overview
TSI350A-66CQ from Integrated Device Technology is a 32-bit, 66 MHz PCI-to-PCI bridge IC compliant with PCI Local Bus Specification Revision 2.3. It features dual asynchronous PCI interfaces, supports up to nine bus masters on its secondary interface, provides ten independent secondary clock outputs, and enables concurrent primary/secondary bus operation for traffic isolation in multimedia systems.
For engineers reviewing the TSI350A-66CQ datasheet, TSI350A-66CQ pinout, TSI350A-66CQ application, or TSI350A-66CQ equivalent, key selection considerations include secondary bus arbitration support, Hot Swap capability per CompactPCI, D3Hot power management, VGA/Palette memory decoding options, and compatibility with Intel/TI/PLX/Pericom bridge solutions.
Technical Context
The TSI350A-66CQ implements two fully independent PCI interfaces - primary and secondary - each capable of acting as bus master or slave depending on transaction type. Its internal architecture includes separate posted/non-posted buffers and queues, a secondary bus arbiter, address decoder, and mux logic to manage concurrent data flow between buses.
It supports asynchronous clocking between interfaces, with secondary clocks optionally derived from the primary clock or supplied externally. Secondary clock masking via GPIO during power-up and four independent delayed transactions per direction are implemented at silicon level for deterministic timing control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCI Compliance | PCI Local Bus Specification Rev 2.3 - ensures interoperability with standard PCI host bridges and peripherals. |
| Bus Width / Speed | 32-bit, 66 MHz - delivers up to 264 MB/s bandwidth per interface under burst transfer conditions. |
| Secondary Masters | Up to 9 - allows connection of multiple PCI devices on secondary bus without violating loading rules. |
| Secondary Clocks | 10 independent outputs - enables individual slot clock enable/disable for hot-swap sequencing and power management. |
| Power State Support | D3Hot with optional clock disable - reduces dynamic power during low-activity states while retaining configuration context. |
| Hot Swap | CompactPCI-compliant - supports safe insertion/removal of secondary-side cards with voltage and current ramp control. |
| Memory Decoding | VGA/Palette memory and I/O decoding - enables legacy graphics subsystem integration without external logic. |
Pinout & Package
TSI350A-66CQ is packaged in a 208-pin Plastic Quad Flat Package (PQFP) with 3.3 V I/O and 5 V tolerant signaling. Pin assignments are defined per IDT document 80D5000_FB001_07 and include dedicated PCI signal groups for primary and secondary buses, JTAG boundary scan (IEEE 1149.1), GPIO, clock inputs/outputs, reset, and arbitration lines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLKIN | Primary PCI clock input | Accepts 33 or 66 MHz reference clock for primary interface timing generation. |
| CLKOUT | Primary PCI clock output | Drives primary bus clock tree; synchronous with CLKIN when not in spread-spectrum mode. |
| SCLKIN | Secondary clock source input | Optional external 33/66 MHz clock source for secondary interface when not using CLKIN-derived clock. |
| REQ# / GNT# (Sx) | Secondary bus request/grant signals | Supports up to nine independent secondary bus masters with dedicated REQ#/GNT# pairs. |
| AD[31:0] (P/S) | Address/Data multiplexed bus | Dual 32-bit AD buses - primary and secondary - each time-multiplexed for address and data phases. |
| TCK/TMS/TDO/TDI | JTAG boundary scan interface | Enables IEEE 1149.1 compliance for board-level test and debug without requiring functional access. |
Key Features
| Feature | Design Value |
|---|---|
| Concurrent bus operation | Enables simultaneous primary and secondary PCI transactions, isolating traffic to prevent bus contention and improve throughput in multi-device systems. |
| Configurable posted write buffering | Optional flush-on-same-direction prevents coherency issues when multiple posted writes target overlapping memory regions. |
| External secondary arbiter support | Allows system-level arbitration logic to override on-chip secondary arbiter for custom priority schemes or deterministic latency control. |
| GPIO-controlled clock masking | Permits selective disabling of secondary clock outputs during power-up sequences to meet CompactPCI hot-swap timing requirements. |
| Bus locking mechanism | Guarantees atomic execution of multi-cycle operations (e.g., VGA palette updates) by preventing bus ownership handoff mid-transaction. |
Applications
| Industrial PC Backplanes | Video Capture Cards |
|---|---|
Use Scenario: Expanding I/O capacity in ruggedized IPC chassis where space and slot count are constrained. IC Role / Device Role / Timing Role: PCI-to-PCI bridge providing isolated secondary bus segment with independent clocking and arbitration. Use Value: Enables up to nine additional PCI devices on backplane without violating PCI loading rules or requiring host bridge modification. | Use Scenario: Integrating multiple video decoders, frame buffers, and DMA controllers on a single PCIe-adjacent capture card. IC Role / Device Role / Timing Role: Bridge isolating high-bandwidth video data paths from host bus congestion during real-time acquisition. Use Value: Concurrent primary/secondary operation maintains sustained 264 MB/s throughput per bus, avoiding frame drops under load. |
| Embedded Video Recorders | Storage Host Bus Adapters |
Use Scenario: Adding multi-channel encode/decode engines and SATA RAID controllers behind a single PCI slot in compact EVR enclosures. IC Role / Device Role / Timing Role: Secondary bus hub enabling synchronized timestamping and buffer management across heterogeneous peripherals. Use Value: Ten programmable secondary clock outputs allow precise skew control for video/audio sync and storage controller timing alignment. | Use Scenario: Building high-port-count SAS/SATA HBAs that exceed single-bus device limits while maintaining BIOS compatibility. IC Role / Device Role / Timing Role: Transparent bridge presenting secondary devices as native PCI targets to host system firmware. Use Value: VGA/Palette memory decoding support allows legacy BIOS-based storage initialization without UEFI driver dependencies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCI-to-PCI bridge applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PLX Technology PCI9054-AC50BI | 32-bit, 66 MHz, supports local bus interface (EISA/VME) in addition to PCI; lacks CompactPCI Hot Swap support. | Targeted at industrial control systems requiring non-PCI local bus expansion, not optimized for hot-plug backplanes. | Choose when local bus peripheral interfacing is required; avoid if CompactPCI compliance is mandatory. |
| Pericom PI7C9X110BQF | 32-bit, 66 MHz, integrated SMBus controller and enhanced power management (D0-D3); no secondary clock masking via GPIO. | Designed for embedded systems needing simplified thermal/power management, not for strict CompactPCI timing control. | Prefer for low-power embedded designs; TSI350A-66CQ remains optimal for hot-swap–critical applications. |
Compared with PLX PCI9054-AC50BI and Pericom PI7C9X110BQF, the TSI350A-66CQ uniquely combines CompactPCI Hot Swap support, GPIO-controllable secondary clock masking, and nine-master secondary arbitration - making it the only option qualified for ruggedized, field-upgradeable backplane designs requiring deterministic power sequencing.
Availability
TSI350A-66CQ is available at Aetrix Electronics and suitable for industrial PC backplanes, video capture cards, and embedded video recorders requiring stable component supply and long-term lifecycle support.
Supply support for TSI350A-66CQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Integrated Device Technology (IDT) is a fabless semiconductor company specializing in timing, interface, and memory connectivity solutions for communications, computing, and industrial markets.
The TSI350A-66CQ belongs to IDT's PCI interconnect product line, engineered specifically to extend PCI system scalability while maintaining full specification compliance and enabling robust hot-swap implementations in mission-critical platforms.
FAQ
What PCI specification revision does the TSI350A-66CQ comply with?
The TSI350A-66CQ is fully compliant with PCI Local Bus Specification Revision 2.3. This ensures interoperability with host bridges and peripherals designed to that standard, including support for 66 MHz operation, 32-bit addressing, and all mandatory transaction types. The compliance was verified through IDT's internal validation and third-party PCI-SIG testing prior to release.
Does the TSI350A-66CQ support asynchronous clocking between primary and secondary PCI buses?
Yes, the TSI350A-66CQ supports fully asynchronous operation between its primary and secondary PCI interfaces. The secondary clock can be derived from the primary clock or supplied independently via SCLKIN, allowing independent frequency domains. This capability is implemented in hardware and documented in IDT's 80D5000_FB001_07 datasheet section 4.2.
How many PCI bus masters can the TSI350A-66CQ support on its secondary interface?
The TSI350A-66CQ supports up to nine PCI bus masters on its secondary interface, with dedicated REQ#/GNT# signal pairs for each. This is confirmed in the device overview and feature list of the official TSI350A Product Brief (document 80D5000_FB001_07), enabling multi-device option cards without violating PCI loading rules.
Is CompactPCI Hot Swap functionality supported by the TSI350A-66CQ?
Yes, the TSI350A-66CQ explicitly supports CompactPCI Hot Swap functionality, including voltage monitoring, current limiting, and controlled power sequencing. This is enabled via GPIO-controlled clock masking and dedicated Hot Swap logic blocks, as described in the "Features" section of the TSI350A Product Brief and verified in application note AN-701.
What package type and voltage specifications apply to the TSI350A-66CQ?
The TSI350A-66CQ is offered in a 208-pin Plastic Quad Flat Package (PQFP) with 3.3 V I/O and 5 V tolerant inputs. This packaging is specified in IDT's official documentation (80D5000_FB001_07) and enables direct interface with both 3.3 V and legacy 5 V PCI signaling environments without level-shifting circuitry.
TSI350A-66CQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 208-BFQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Applications:
- PCI-to-PCI Bridge
- Interface:
- PCI
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 208-PQFP (28x28)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
TSI350A-66CQ FAQ
1.How can I place an order for TSI350A-66CQ through Aetrix?
Please submit a Request for Quotation (RFQ) for TSI350A-66CQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSI350A-66CQ reliable?
The price and inventory of TSI350A-66CQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSI350A-66CQ is usually 5 days.
3.What payment methods are accepted for TSI350A-66CQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSI350A-66CQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSI350A-66CQ?
TSI350A-66CQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSI350A-66CQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSI350A-66CQ?
For technical support, including TSI350A-66CQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSI350A-66CQ requirements.
6.How does Aetrix verify that TSI350A-66CQ is sourced from the original manufacturer or authorized distributors?
All TSI350A-66CQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSI350A-66CQ meets industry standards.
7.What is the process for return or replacement of TSI350A-66CQ?
All TSI350A-66CQ units undergo pre-shipment inspection (PSI). If there is an issue with TSI350A-66CQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSI350A-66CQ part is unused and in its original packaging.
Return procedure for TSI350A-66CQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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