Renesas TSI350A-66CQY

Overview

TSI350A-66CQY from Integrated Device Technology is a 32-bit, 66 MHz PCI-to-PCI bridge IC compliant with PCI Local Bus Specification Revision 2.3. It features dual asynchronous PCI interfaces, supports up to nine bus masters on its secondary interface, provides ten independent secondary clock outputs, and enables concurrent primary/secondary bus operation for traffic isolation in multimedia systems.

For engineers reviewing the TSI350A-66CQY datasheet, TSI350A-66CQY pinout, TSI350A-66CQY application, or TSI350A-66CQY equivalent, key selection criteria include secondary bus arbitration support, Hot Swap capability per CompactPCI, D3Hot power management, and 3.3 V I/O with 5 V tolerance - all confirmed for this PQFP-208 variant.

Technical Context

The TSI350A-66CQY implements two fully independent PCI transaction engines - one for the primary bus and one for the secondary bus - each capable of acting as master or slave depending on transaction type. Its architecture includes separate posted/non-posted buffers and queues, a dedicated secondary bus arbiter, and mux logic enabling bidirectional delayed transactions (up to four per direction).

It integrates IEEE 1149.1 JTAG boundary scan, supports external clock sourcing or primary-clock derivation for secondary clocks, and allows GPIO-controlled masking of secondary clocks during power-up. The device also implements bus locking, VGA/palette memory decoding, and optional non-posted entry flush on same-direction posted writes.

Key Specifications

Pinout & Package

TSI350A-66CQY is packaged in a 208-pin Plastic Quad Flat Package (PQFP) with 0.5 mm pitch, lead-free and RoHS-compliant. Pin functions are defined per IDT document 80D5000_FB001_07 and validated against official IDT pinout diagrams.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCI-to-PCI bridge applications.

Compared with PLX PCI9054-AC50BI and Pericom PI7C8150BQF, the TSI350A-66CQY uniquely delivers 10 maskable secondary clocks, IEEE 1149.1 testability, and full CompactPCI Hot Swap - making it the only option qualified for industrial backplane and EVR applications requiring field-serviceable modules and deterministic power sequencing.

Availability

TSI350A-66CQY is available at Aetrix Electronics and suitable for industrial PC backplanes, embedded video recorders, and storage host bus adapters requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for TSI350A-66CQY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Integrated Device Technology, Inc. (IDT) is a fabless semiconductor company specializing in timing, interface, and interconnect solutions for communications, computing, and industrial markets.

The TSI350A product line was designed specifically to extend PCI system capacity in rugged, high-reliability applications - including industrial automation, medical imaging, and defense electronics - where bus loading, thermal constraints, and serviceability are critical.

FAQ

What is the maximum number of PCI devices supported by the TSI350A-66CQY on its secondary interface?

The TSI350A-66CQY supports up to nine PCI bus master devices directly on its secondary interface, as confirmed in IDT's Product Brief (document 80D5000_FB001_07). This capability allows motherboard and option-card designers to exceed single-bus loading limits while remaining fully compliant with PCI Local Bus Specification Revision 2.3. Each master requires dedicated REQ#/GNT# signaling, which the TSI350A-66CQY provides through its nine secondary request/grant pairs.

Does the TSI350A-66CQY support asynchronous clocking between primary and secondary PCI buses?

Yes, the TSI350A-66CQY explicitly supports asynchronous operation of its primary and secondary PCI interfaces. According to IDT documentation, the secondary clock can be derived from the primary clock or supplied independently by an external source. This feature enables noise isolation and flexible system timing design - critical in mixed-signal industrial applications where ground bounce or jitter coupling must be minimized between bus domains.

Is the TSI350A-66CQY compatible with CompactPCI Hot Swap functionality?

Yes, the TSI350A-66CQY implements CompactPCI Hot Swap functionality as stated in its official Product Brief. It includes dedicated Hot Swap logic, JTAG boundary scan (IEEE 1149.1), and GPIO-controllable secondary clock masking - all required for safe, powered-backplane module insertion and removal. This makes the TSI350A-66CQY suitable for field-serviceable systems like embedded video recorders and firewall gateways where uptime is mission-critical.

What package type and pin count does the TSI350A-66CQY use?

The TSI350A-66CQY uses a 208-pin Plastic Quad Flat Package (PQFP) with 0.5 mm pitch, as specified in IDT's official documentation (80D5000_FB001_07). This package is distinct from the 256-pin PBGA variant and is RoHS-compliant. The "CQY" suffix in the part number explicitly denotes the PQFP-208 configuration, ensuring mechanical and thermal compatibility with standard surface-mount assembly processes used in industrial PCB manufacturing.

Does the TSI350A-66CQY support power management states such as D3Hot?

Yes, the TSI350A-66CQY supports the D3Hot power management state with an option to disable clocks during that state - a feature documented in IDT's Product Brief. This capability reduces dynamic power consumption while preserving device configuration, enabling rapid resume from low-power modes. The implementation complies with PCI Power Management Specification 1.1 and is validated for use in thermally constrained embedded systems like multi-function printers and network interface cards.