STMicroelectronics TSM1011IST

Overview

TSM1011IST from STMicroelectronics is a dual-loop CV/CC controller IC for secondary-side regulation in flyback adapters and battery chargers, integrating two transconductance op-amps with ORed outputs, a 2.545 V precision voltage reference (±0.5% for TSM1011A, ±1% for TSM1011), 4.5–28 V operating supply range, and 2 kV ESD protection.

For engineers reviewing the TSM1011IST datasheet, TSM1011IST pinout, TSM1011IST application, or TSM1011IST equivalent, this device supports precise voltage and current regulation in isolated AC/DC power supplies where secondary-side feedback via optocoupler is required, with accessible compensation nodes and sink-only output stage.

Technical Context

The TSM1011IST implements independent voltage and current control loops using two internally matched transconductance operational amplifiers whose outputs are wired in common-collector (OR) configuration - ensuring that either loop can assert control over the optocoupler driver. The voltage reference (2.545 V, 0.5%/1% tolerance) serves both loops as a stable bias source.

Each op-amp features fully accessible negative input and output terminals for external compensation (e.g., 22 kΩ + 2.2 nF networks), enabling stable loop response across load and line variations. Input common-mode ranges differ per function: CV op-amp accepts 1.5 V to (VCC – 1.5 V); CC op-amp accepts 0 V to (VCC – 1.5 V), supporting ground-referenced current sensing.

Key Specifications

Pinout & Package

Package: SO-8 (Small Outline, 150 mil width), RoHS-compliant ECOPACK® variant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CV/CC controller applications.

Compared with TL431+LM358, TSM1011IST reduces component count by ≥40% and improves CV/CC cross-regulation via matched internal amplifiers; versus UCC28780, it retains analog simplicity and optocoupler-based isolation without firmware dependency.

Availability

TSM1011IST is available at Aetrix Electronics and suitable for laptop adapters, smartphone fast chargers, industrial battery chargers, and USB-C power bank modules requiring stable component supply and long-term production support.

Supply support for TSM1011IST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog devices for industrial, automotive, and consumer markets.

The TSM1011IST belongs to ST's analog power management portfolio, specifically engineered for cost-sensitive, high-volume AC/DC adapter and battery charger applications requiring reliable secondary-side CV/CC regulation without digital complexity.

FAQ

What is the maximum sink current capability of the TSM1011IST OUT pin?

The TSM1011IST OUT pin delivers a guaranteed minimum short-circuit sink current of 27 mA at 25°C, with typical performance reaching 50 mA. This rating applies when sinking into VCC, and the output stage is designed exclusively for current sinking - not sourcing - making it ideal for driving optocoupler LEDs in feedback paths.

Can the TSM1011IST operate with a 3.3 V supply?

No. The TSM1011IST requires a minimum supply voltage of 4.5 V per its absolute maximum ratings and operating conditions. At 3.3 V, internal biasing fails, reference regulation collapses, and op-amp functionality ceases. For low-voltage applications, consider discrete solutions or controllers with extended UVLO thresholds.

How does the TSM1011IST handle simultaneous voltage and current faults?

The TSM1011IST uses wired-OR output architecture: both op-amps drive the same OUT pin in sink mode. If either CV or CC loop detects an excursion beyond setpoint, its output pulls OUT low - immediately activating the optocoupler. No arbitration logic is needed; the first fault condition to trigger dominates the feedback signal.

Is there a recommended PCB layout practice for minimizing noise coupling into CV− and CC− pins?

Yes. Route CV− and CC− traces as short, direct, and shielded as possible - avoid routing near switching nodes or power planes. Place local 100 nF ceramic decoupling capacitors between VRef and GND, and use separate ground pours for analog and power sections, joined only at a single point near GND pin 6 to prevent return-current interference.