STMicroelectronics TSM101AID

Overview

TSM101AID from STMicroelectronics is a precision voltage and current controller IC for secondary-side feedback in isolated SMPS, integrating a 1.24V ±1% bandgap reference, two ORed op-amps (1MHz GBW), and an enableable 1.4mA current source. It operates from 4.5V to 32V supply, delivers up to 10mA reference output, and targets battery chargers requiring simultaneous CV/CC regulation with optocoupler-driven PWM control.

For engineers reviewing the TSM101AID datasheet, TSM101AID pinout, TSM101AID application, or TSM101AID equivalent, key selection criteria include its dual-loop error amplification architecture, temperature-stable 30 ppm/°C reference drift, SO8 package compatibility with DIP8 footprints, and direct optocoupler LED drive capability at OUTPUT (Pin 6).

Technical Context

The TSM101AID implements a dual-error-amplifier topology where both op-amps share a common 1.24V reference and produce an ORed output driving an external optocoupler LED. Its internal current generator (Io = 1.4mA ±10%) enables programmable current-limit offset via Pin 2 (Csen), allowing dynamic charge-current adjustment without hardware changes.

It functions as a galvanically isolated secondary-side controller: Vrin (Pin 7) monitors regulated output voltage via resistor divider; Crin (Pin 5) senses current through a shunt; Crref (Pin 3) sets current-limit threshold; and OUTPUT (Pin 6) sinks up to 15mA to modulate optocoupler conduction-directly influencing primary-side PWM duty cycle.

Key Specifications

Pinout & Package

Package: SO8 (Plastic Micropackage), 150°C max junction temperature, 130–200°C/W thermal resistance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage and current controller applications.

Compared with TL431+LM358, TSM101AID reduces board space by 60% and enables seamless current-rate switching; versus UC3907, it provides true secondary-side CV/CC co-regulation but requires optocoupler interface.

Availability

TSM101AID is available at Aetrix Electronics and suitable for battery chargers, isolated AC/DC adapters, voltage supervisors with current foldback, and programmable lab power supplies requiring stable component supply and guaranteed long-term sourcing.

Supply support for TSM101AID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for automotive, industrial, and consumer markets.

The TSM101AID belongs to ST's power management analog portfolio, engineered specifically for cost-sensitive, isolated SMPS secondary-side control where integration of reference, dual error amplifiers, and programmable current source improves reliability and reduces bill-of-materials.

FAQ

What is the maximum allowable load on the Vref (Pin 1) output?

The Vref pin delivers up to 10mA with ±1% accuracy at 25°C. Exceeding this current degrades reference stability and increases temperature drift beyond 30 ppm/°C. For higher loads, buffer with a unity-gain op-amp or use the internal reference only for high-impedance divider networks (≥10kΩ total resistance).

How does the ORed output architecture affect loop stability?

The ORed output ensures the most demanding loop (voltage or current) dominates control-preventing conflict during transient events. This eliminates need for external diode-ORing and simplifies compensation: a single RC network (e.g., 100nF + 10kΩ) on Pin 6 suffices for 50–100kHz SMPS, as confirmed in ST Application Note AN896.

Can TSM101AID operate with a 3.3V auxiliary supply?

No-minimum Vcc is 4.5V per absolute maximum ratings. At 3.3V, internal bandgap reference fails to regulate, op-amps saturate, and current source becomes inactive. For low-voltage applications, use an auxiliary winding or LDO to generate ≥4.5V, as detailed in TSM101/A page 7 (Figure 4).

What is the purpose of the Csen (Pin 2) voltage thresholds (0.6V enable / 2V disable)?

These thresholds provide noise immunity: logic-low <0.6V guarantees current source activation, while >2V ensures full disable-preventing false triggering from EMI or supply ripple. A 10kΩ pull-up to Vcc and direct ground switch meets this reliably, as validated in ST's 12V/1A charger reference design (page 11, Table 1).