STMicroelectronics TSM101CDT

Overview

TSM101CDT from STMicroelectronics is a dual-loop voltage and current controller IC for SMPS secondary-side feedback, integrating a 1.24V ±1% precision bandgap reference, two ORed operational amplifiers (1 MHz GBW), and an enableable 1.4 mA current source. It operates from 4.5 V to 32 V supply, delivers up to 10 mA reference output, and is packaged in SO-8 for battery charger applications requiring simultaneous CV/CC regulation.

For engineers reviewing the TSM101CDT datasheet, TSM101CDT pinout, TSM101CDT application, or TSM101CDT equivalent, key selection criteria include its dual-loop architecture with shared 1.24 V reference, pin 2–enabled current-source offsetting capability, optocoupler-compatible open-collector output (pin 6), and SO-8 thermal performance under continuous 15 V supply.

Technical Context

The TSM101CDT implements a tightly coupled dual-control architecture: one op-amp compares scaled output voltage against the internal 1.24 V reference (pin 1), while the second compares sense-resistor voltage (pin 5) against the same reference-both outputs are ORed internally to drive the common open-collector output (pin 6). This eliminates external logic and ensures fail-safe priority of current-limiting action over voltage regulation.

Its built-in current generator (1.4 mA, ±500 ppm/°C tempco) connects to pin 2 (Csen); sinking this pin below 0.6 V enables the source, injecting offset current into the current-sense path to dynamically reduce charge current-e.g., from 700 mA to 200 mA-without changing hardware. The reference exhibits 30 ppm/°C max temperature stability and 5 mV load regulation (1–10 mA).

Key Specifications

Pinout & Package

SO-8 plastic micropackage (JEDEC MS-012AC), 1.27 mm pitch, 5.0 × 6.0 mm body, 1.75 mm height; suitable for automated SMT assembly and thermal dissipation up to 200 mW at 25°C ambient.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage and current controller applications.

Compared with TL431+LM358, TSM101CDT reduces component count by 60% and eliminates reference mismatch errors; versus UC3907, it offers lower system cost and simpler analog-only implementation for basic battery charging.

Availability

TSM101CDT is available at Aetrix Electronics and suitable for battery chargers, industrial SMPS feedback systems, and overvoltage supervisors requiring stable component supply, long-term lifecycle support, and RoHS-compliant SO-8 packaging.

Supply support for TSM101CDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for automotive, industrial, and consumer markets.

The TSM101 series belongs to ST's Power Management Analog portfolio, engineered specifically for cost-sensitive, high-reliability secondary-side feedback in AC/DC and DC/DC converters-emphasizing integration, thermal robustness, and ease of compliance with IEC/UL safety standards.

FAQ

What is the maximum allowable voltage on the Vrin (pin 7) and Crin (pin 5) inputs?

The absolute maximum input voltage on pins 5 and 7 is VCC − 1.5 V, per the datasheet's "Vin Input Voltage" specification. For a 32 V supply, this limits valid input range to 0 V to 30.5 V. Exceeding this risks permanent damage due to internal ESD diode conduction and junction breakdown. Always use resistive scaling networks to ensure compliance across full operating temperature range.

Can the TSM101CDT operate with a 3.3 V supply?

No. The minimum specified supply voltage is 4.5 V. At 3.3 V, the internal bandgap reference fails to regulate, op-amp output swing collapses below 1 V, and the current source ceases operation. Attempting 3.3 V operation results in undefined behavior, including loss of voltage regulation and uncontrolled current limiting. Use a low-dropout regulator to generate ≥4.5 V from 3.3 V rails if needed.

How does the Csen (pin 2) enable function interact with the current source's temperature coefficient?

The 1.4 mA current source has a guaranteed temperature coefficient of 500–600 ppm/°C. When pin 2 is pulled low, this current injects directly into the Crin node (pin 5), offsetting the sensed voltage by ΔV = 1.4 mA × R4. Because both the source and the op-amp input stage track temperature similarly, the net current-limit threshold shift remains within ±5% over –20°C to +80°C-verified in ST's AN896 application note.

Is the OUTPUT (pin 6) compatible with 5 V logic-level optocouplers?

Yes. Pin 6 is an open-collector NPN output with guaranteed sink current ≥8 mA at VOL = 2.5 V (tested at 25°C). It fully saturates when driving standard 5 V optocouplers like PC817 (IF = 5 mA, VF ≈ 1.2 V), delivering >3.5 mA LED current with 1 kΩ pull-up to 5 V. No level-shifting circuitry is required for compatibility with 5 V primary-side controllers.