STMicroelectronics TSM103AID
- Part No.:
- TSM103AID
- Manufacturer:
- STMicroelectronics
- Category:
- Special Purpose Amplifiers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TSM103AID.pdf
- Description:
- IC AMPLIFIER 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,565
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TSM103AID from STMicroelectronics is a dual operational amplifier with integrated 2.5 V precision voltage reference, featuring 0.5 mV typical input offset voltage (TSM103A grade), 350 µA/op supply current at 5 V, 0.9 MHz unity-gain bandwidth, rail-to-rail output swing (0 V to VCC − 1.5 V), and ±1.5 V to ±16 V dual-supply operation. It is used in power supply feedback loops, battery monitoring circuits, and analog front-ends for industrial sensors.
For engineers reviewing the TSM103AID datasheet, TSM103AID pinout, TSM103AID application, or TSM103AID equivalent, key selection criteria include its dual-opamp + reference integration, 0.4% reference accuracy at 25 °C, sink capability up to 100 mA, low 0.2 Ω dynamic reference impedance, and SO8 package compatibility with legacy board layouts.
Technical Context
The device integrates two independent op-amps: OP1 has its non-inverting input internally tied to a trimmed 2.5 V bandgap reference, while OP2 is fully independent. Both amplifiers share a common supply rail and operate over 3–32 V single-supply or ±1.5–±16 V dual-supply ranges.
Reference performance includes 2.475–2.525 V output at 25 °C (0.4% initial accuracy), 7–30 mV drift over temperature, and stable regulation down to 0.5 mA cathode current. Output stage supports 20–40 mA sourcing and 10–20 mA sinking per op-amp under 15 V supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage (OP1/OP2) | 0.5 mV typ. - enables accurate DC-coupled signal conditioning without external trimming |
| Supply Current per Op-Amp | 350 µA @ 5 V - supports low-power battery-operated systems with dual amplification + reference |
| Unity-Gain Bandwidth | 0.9 MHz - sufficient for closed-loop power supply error amplifiers and sensor signal buffering |
| Reference Output Voltage | 2.5 V ±0.025 V @ 25 °C - provides stable bias point for ADC references or comparator thresholds |
| Reference Sink Current Range | 1–100 mA - allows direct driving of optocoupler LEDs or small loads without external transistors |
| Output Voltage Swing | 0 V to (VCC − 1.5 V) - delivers near-rail output in single-supply configurations for improved dynamic range |
| Common-Mode Input Range | Includes ground - permits direct sensing of signals referenced to system GND in single-supply applications |
Pinout & Package
Package: SO8 (Plastic Micropackage), 8-pin small outline, surface-mount, JEDEC MS-012AC compliant, thermal resistance RthJA = 175 °C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Output 1 (OP1) | Amplifier output with internal 2.5 V reference bias on non-inverting input |
| 2 | VCC+ | Positive supply rail for both op-amps and reference circuitry |
| 3 | Non-inverting Input 1 | Internally connected to 2.5 V reference - not externally accessible |
| 4 | Inverting Input 1 | Feedback/input node for OP1; sets gain and operating point relative to 2.5 V reference |
| 5 | Output 2 (OP2) | Fully independent op-amp output, usable as general-purpose amplifier or comparator driver |
| 6 | Non-inverting Input 2 | Externally accessible high-impedance input for OP2 |
| 7 | Inverting Input 2 | Externally accessible high-impedance input for OP2 |
| 8 | VCC− | Negative supply rail (GND in single-supply mode); completes bias path for reference and both op-amps |
Key Features
| Feature | Design Value |
|---|---|
| Dual op-amp + 2.5 V reference in one SO8 | Reduces PCB area and BOM count vs. discrete op-amp + shunt reference solutions |
| 0.4% reference accuracy at 25 °C | Eliminates need for external calibration in mid-precision analog monitoring applications |
| Input common-mode range includes ground | Enables direct interface with 0 V-referenced sensors (e.g., current-sense resistors, thermistors) |
| Low 0.2 Ω dynamic reference impedance | Maintains stable 2.5 V under fast load transients, critical for ADC reference stability |
| Wide 3–32 V supply range | Supports operation across automotive battery (12 V), industrial rails (24 V), and legacy 5 V logic domains |
Applications
| Switch-Mode Power Supply Feedback | Battery Voltage Monitor |
|---|---|
Use Scenario: Regulating output voltage in isolated flyback or forward converters using optocoupler-coupled feedback. IC Role / Device Role / Timing Role: OP1 functions as error amplifier comparing sensed output against internal 2.5 V reference; OP2 buffers or conditions auxiliary signals. Use Value: Integrated reference eliminates external Zener or TL431, reducing component count and improving loop stability margin. | Use Scenario: Monitoring cell voltage in 3S Li-ion packs or lead-acid backup systems with microcontroller ADC. IC Role / Device Role / Timing Role: OP2 configured as unity-gain buffer scales battery voltage to match 2.5 V ADC reference; OP1 unused or repurposed. Use Value: Shared 2.5 V reference ensures matched scaling between monitored signal and ADC full-scale, minimizing ratio-metric error. |
| Industrial Sensor Signal Conditioning | Programmable Current Source |
Use Scenario: Amplifying low-level outputs from RTDs, strain gauges, or pressure transducers in 4–20 mA transmitter designs. IC Role / Device Role / Timing Role: OP2 provides precision instrumentation gain; OP1 supplies stable 2.5 V excitation or bias for bridge sensors. Use Value: Matched thermal drift between reference and amplifier inputs minimizes offset drift in temperature-varying environments. | Use Scenario: Generating precise 4–20 mA loop current using voltage-controlled current sink topology. IC Role / Device Role / Timing Role: OP1 drives gate/base of external transistor using 2.5 V reference as setpoint; OP2 monitors sense resistor voltage. Use Value: 100 mA sink capability allows direct drive of medium-current loads without additional pass devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-opamp-plus-reference applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM358DR + TL431ACD | Discrete solution: separate dual op-amp (LM358) and adjustable shunt reference (TL431); no internal 2.5 V tie; higher board area | Requires external resistor network to set 2.5 V; lacks monolithic thermal tracking between reference and OP1 | Preferred when design requires adjustable reference voltage or higher reference current (>100 mA) |
| TSM103WID | Direct ST replacement: same pinout, enhanced ESD rating (4 kV HBM), improved reference tempco (±15 ppm/°C vs. ±12 ppm/°C), same 0.4% initial accuracy | Drop-in upgrade path; identical functional behavior; extended lifecycle support | Recommended for new designs requiring active ST support and improved robustness |
Compared with LM358+TL431, TSM103AID reduces layout complexity and improves thermal matching but offers fixed 2.5 V only; versus TSM103WID, it lacks ESD hardening and has slightly wider reference drift, making the W version preferable for production ramp.
Availability
TSM103AID is available at Aetrix Electronics and suitable for switch-mode power supply feedback, battery voltage monitoring, and industrial sensor signal conditioning requiring stable component supply and legacy SO8 footprint compatibility.
Supply support for TSM103AID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.
The TSM103 series belongs to ST's precision analog portfolio, engineered to consolidate error amplification and voltage referencing in power management ICs-targeting cost-sensitive, space-constrained applications where integration improves reliability and reduces bill-of-materials.
FAQ
Can TSM103AID operate from a single 3.3 V supply?
No. The minimum total supply voltage is 3 V, but the output swing is specified as 0 V to (VCC − 1.5 V). At 3.3 V supply, maximum output is only 1.8 V, and reference regulation requires ≥1 mA cathode current-insufficient headroom for reliable 2.5 V reference operation. Minimum recommended single supply is 5 V.
Is the 2.5 V reference accessible at a dedicated pin?
No. The 2.5 V reference is internal and only connected to the non-inverting input of OP1 (Pin 3). It is not brought out to a package pin. External access requires using OP1 in unity-gain follower configuration with output (Pin 1) buffered.
What is the maximum capacitive load the reference can drive?
The reference is stable with up to 10 nF capacitive load, as confirmed by stability curves in the datasheet (page 8). Larger capacitances may cause oscillation due to phase shift introduced by the 0.2 Ω dynamic impedance interacting with CL; a series resistor ≥10 Ω is recommended for >10 nF loads.
Does TSM103AID support rail-to-rail input?
No. While the input common-mode range includes ground (down to −0.3 V), the upper limit is (VCC+ − 1.5 V). Neither input can swing to the positive rail. True rail-to-rail input operation is not supported; this differs from modern RRI op-amps but matches legacy bipolar process limitations.
TSM103AID Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Type:
- Amplifier
- Applications:
- Power Management
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-SOIC
TSM103AID FAQ
1.How can I place an order for TSM103AID through Aetrix?
Please submit a Request for Quotation (RFQ) for TSM103AID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSM103AID reliable?
The price and inventory of TSM103AID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSM103AID is usually 5 days.
3.What payment methods are accepted for TSM103AID?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSM103AID transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSM103AID?
TSM103AID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSM103AID order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSM103AID?
For technical support, including TSM103AID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSM103AID requirements.
6.How does Aetrix verify that TSM103AID is sourced from the original manufacturer or authorized distributors?
All TSM103AID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSM103AID meets industry standards.
7.What is the process for return or replacement of TSM103AID?
All TSM103AID units undergo pre-shipment inspection (PSI). If there is an issue with TSM103AID, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSM103AID part is unused and in its original packaging.
Return procedure for TSM103AID:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TSM103AID Tags

-
TSM103WIDT
STMicroelectronics

-
LM392M/NOPB
Texas Instruments

-
MCP6S93T-E/UN
Microchip Technology

-
INA137UA/2K5
Texas Instruments

-
INA134UA/2K5
Texas Instruments

-
TS34118CS28 RDG
Taiwan Semiconductor Corporation

-
SI8920BC-IPR
Skyworks Solutions Inc.

-
ADUM3190ARQZ-RL7
Analog Devices Inc.

-
ADUM3190ARQZ
Analog Devices Inc.

-
AMC1311BDWVR
Texas Instruments

-
AMC1350DWVR
Texas Instruments

-
ADUM3190SRQZ-RL7
Analog Devices Inc.
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
