STMicroelectronics TSM1052

Overview

TSM1052 from STMicroelectronics is a secondary-side constant voltage (CV) and constant current (CC) controller IC for flyback SMPS in battery chargers and AC-DC adapters. It integrates dual transconductance op amps, a 1.21 V ±0.5% bandgap reference, -200 mV current-sense threshold, 1.7–18 V supply range, and wired-or open-drain output stage in SOT23-6 package.

For engineers reviewing the TSM1052 datasheet, TSM1052 pinout, TSM1052 application, or TSM1052 equivalent, key selection criteria include dual-loop CV/CC regulation accuracy, low quiescent current (150 µA typ.), SOT23-6 footprint constraints, optocoupler-compatible open-drain output, and independent compensation access for both control loops.

Technical Context

The TSM1052 implements two independent analog control loops: one voltage loop using an op amp with 1.21 V reference and inverting input (Vctrl), and one current loop using a second op amp with -200 mV internal threshold referenced to Vsense/Ictrl. Both loops drive a shared open-drain output (OUT) that sinks up to 100 mA.

Compensation is fully accessible-each loop provides direct access to its op amp's output and inverting input for external RC networks. The device operates down to 1.7 V supply and supports supply-independent CV/CC regulation when Vcc is decoupled from the main output via auxiliary winding or local LDO.

Key Specifications

Pinout & Package

Package: SOT23-6 - ultra-compact surface-mount package (2.8 × 1.5 mm, 0.95 mm pitch), JEDEC MO178AB compliant, ECOPACK® lead-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar constant voltage and constant current control applications.

Compared with NCP1207 and UCC28704, the TSM1052 delivers true secondary-side measurement fidelity and independent analog loop tuning-critical where primary-side sensing introduces voltage drop errors or transformer variability compromises regulation accuracy.

Availability

TSM1052 is available at Aetrix Electronics and suitable for smartphone fast charging adapters, medical-grade portable battery chargers, and industrial Li-ion pack maintenance chargers requiring stable component supply and long-term manufacturability.

Supply support for TSM1052 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog products for industrial, automotive, and consumer markets.

The TSM1052 belongs to ST's dedicated AC-DC secondary-side controller product line, engineered specifically for space-constrained, high-accuracy CV/CC regulation in universal input offline SMPS used in chargers and adapters.

FAQ

What is the minimum supply voltage required for TSM1052 to initiate regulation?

The TSM1052 operates down to 1.7 V on Vcc, enabling reliable start-up from auxiliary windings even during low-output or short-circuit conditions. Below 1.7 V, internal biasing fails and regulation ceases; design must ensure auxiliary supply remains above this threshold across all operating modes including no-load and fault states.

How does the TSM1052 handle transition between constant voltage and constant current modes?

The TSM1052 uses wired-or open-drain outputs from two independent transconductance op amps sharing the OUT pin. Whichever loop generates higher sink current dominates the optocoupler drive-ensuring automatic, glitch-free handover from CV to CC mode without external logic or timing circuits.

Can the TSM1052 be used with non-optocoupler feedback architectures?

No-the OUT pin is strictly open-drain and designed to sink current into an optocoupler LED cathode. It lacks push-pull or voltage-source capability and cannot directly interface with primary-side controllers requiring voltage-mode feedback or digital communication protocols like I²C or UART.

What is the recommended layout practice for minimizing noise coupling into Vsense and Vctrl pins?

Route Vsense and Vctrl traces as short, direct paths away from switching nodes and power planes; use guard rings tied to GND around these pins; place decoupling capacitors (e.g., 1 nF ceramic) directly between Vsense–GND and Vctrl–GND; avoid routing beneath the IC body to prevent substrate coupling.