STMicroelectronics TSM112CN

Overview

TSM112CN from STMicroelectronics is a triple-rail housekeeping IC for PC SMPS, providing overvoltage (3.8–4.2 V for 3.3V, 5.8–6.4 V for 5V, 13.4–15 V for 12V) and undervoltage (2.1–2.5 V, 3.7–4.3 V, 9.2–10.8 V) protection without external components on +3.3V/+5V/+12V rails, plus precision 2.5 V reference and open-collector FAULT/PG outputs. It enables safe power sequencing in ATX-style desktop power supplies.

For engineers reviewing the TSM112CN datasheet, TSM112CN pinout, TSM112CN application, or TSM112CN equivalent, key selection considerations include its integrated triple-rail OV/UV thresholds, adjustable blanking/delay timing via external capacitors (Tuv/Tpg/Trem), remote-controlled latch reset, and 2 kV ESD-rated 14-pin DIP package.

Technical Context

The TSM112CN implements three independent voltage comparators per rail-each with fixed internal thresholds for OV and UV detection-feeding into OR-logic paths that drive a fault latch. Its UV blanking during power-up (Tuv) and PG delay (Tpg) are externally adjustable via capacitor-connected pins (Tuv, Tpg), enabling precise timing control without internal RC variation.

It integrates a 2.5 V ±20 mV precision reference (line/load regulation ≤25 mV), supports remote ON/OFF control with programmable Trem delay (40–60 ms), and provides dedicated EP input for -5V/-12V OV protection using an external resistor divider. All analog inputs tolerate voltages exceeding Vcc up to 25 V.

Key Specifications

Pinout & Package

Package: 14-pin plastic DIP (Dual In-line Package), 0°C to +85°C operating range, body dimensions 20.0 × 8.5 mm (D × E).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar triple-rail voltage supervision applications.

Compared with UCD90120A and TPS40400, the TSM112CN delivers fully autonomous triple-rail supervision with hardware-configurable timing, eliminating MCU dependency and reducing design complexity-ideal for cost-constrained, high-volume ATX PSUs where analog simplicity and proven reliability are prioritized.

Availability

TSM112CN is available at Aetrix Electronics and suitable for ATX desktop power supplies, industrial triple-rail SMPS, and embedded system power sequencing requiring stable component supply and long-lifecycle support.

Supply support for TSM112CN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, power ICs, sensors, and analog devices for automotive, industrial, and consumer markets.

The TSM112CN belongs to ST's legacy power management housekeeping IC family, engineered specifically for PC and server SMPS applications requiring integrated, low-component-count rail supervision and sequencing control.

FAQ

What is the maximum allowable voltage on VS12, VS5, or VS33 pins?

Each sense pin (VS12, VS5, VS33) supports absolute maximum voltage of 25 V relative to GND, exceeding typical rail voltages. This allows direct connection to 12V, 5V, or 3.3V outputs without attenuation, even during overvoltage transients up to 25 V, as confirmed in Absolute Maximum Ratings.

How does the TUV pin implement under-voltage blanking during power-up?

The TUV pin connects to an external capacitor (Cuv = 2.2 µF typical) that charges through an internal current source. When VCC rises, the rising voltage on TUV delays UV comparator activation for 100–500 ms, preventing false UV faults during rail stabilization-verified in Electrical Characteristics and Figure 5 timing diagrams.

Can the EP pin be used for positive-rail overvoltage protection?

No-the EP pin is designed exclusively for negative-rail OV protection (e.g., -5V or -12V) using an external resistor divider to scale the negative voltage to the internal 1.28 V threshold. Its electrical specification (Vep = 1.28 V) and application schematic confirm it is not intended for positive-rail sensing.

What is the function of the PI (Power Good Input) pin in normal operation?

The PI pin serves as an external enable/disable control for the PG output. When PI is pulled high (>0.8 V), PG reflects internal rail status; when PI is low (<0.7 V), PG is forced low regardless of rail conditions-enabling motherboard-level override of the Power Good signal during diagnostics or safe-mode entry.