STMicroelectronics TSV6192IST
- Part No.:
- TSV6192IST
- Manufacturer:
- STMicroelectronics
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TSV6192IST.pdf
- Description:
- IC CMOS 2 CIRCUIT 8MINISO
- Quantity:
- Payment:

- Shipping:

Inventory:459
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TSV6192IST from STMicroelectronics is a dual rail-to-rail input/output CMOS operational amplifier optimized for ultra-low-power, low-voltage sensor signal conditioning. It delivers 450 kHz gain bandwidth product, 10 µA supply current per amplifier at 5 V, and operates from 1.5 to 5.5 V supply. Its 1 pA typical input bias current and 800 µV max input offset voltage (A version) support precision front-end use in smoke detectors and proximity sensors.
For engineers reviewing the TSV6192IST datasheet, TSV6192IST pinout, TSV6192IST application, or TSV6192IST equivalent, key selection criteria include minimum stable gain (≥5 V/V), rail-to-rail output swing within 35 mV of rails under 10 kΩ load, -40 to 85 °C operating range, and MiniSO-8 package compatibility with space-constrained portable designs.
Technical Context
The TSV6192IST employs complementary PMOS/NMOS input stages enabling true rail-to-rail input common-mode range (VCC− −0.1 V to VCC+ +0.1 V) and output swing within 35 mV of both supply rails under 10 kΩ load. Its internal compensation ensures stability only at closed-loop gains ≥5 V/V, confirmed by 60° phase margin at 10 kΩ feedback/load and 20 pF capacitance.
It features ultra-low input bias current (1 pA typ) and low input offset drift (2 µV/°C), making it suitable for high-impedance sensor interfaces where leakage and thermal drift degrade accuracy. The device maintains specified GBP (450 kHz), CMRR (80 dB), and PSRR (93 dB) across 1.5–5.5 V supply and full temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.5 to 5.5 V - enables direct operation from single-cell Li-ion (3.0–3.7 V), alkaline (1.5 V), or regulated 3.3 V/5 V rails without level-shifting. |
| Gain Bandwidth Product | 450 kHz typ - supports anti-aliasing filtering and sensor signal amplification up to ~45 kHz at unity gain, sufficient for audio-band and slow industrial sensing. |
| Supply Current per Amp | 10.5 µA typ at 5 V - allows continuous operation for >10 years on a 220 mAh coin cell in always-on smoke detector applications. |
| Input Offset Voltage | 800 µV max (TSV6192AIST variant) - ensures ≤0.8 mV DC error in 100× gain configurations, critical for baseline-sensitive gas or IR detection circuits. |
| Input Bias Current | 1 pA typ - minimizes voltage drop across >100 MΩ sensor elements (e.g., photodiodes, piezoresistive bridges), preserving signal integrity. |
| Output Swing | Within 35 mV of VCC and GND at 10 kΩ load - delivers full dynamic range to ADCs with 0–VCC input ranges, eliminating need for external level-shifting. |
| Common-Mode Rejection | 80 dB min - rejects power-supply noise and ground bounce in battery-powered systems where supply regulation is limited. |
Pinout & Package
TSV6192IST is housed in an 8-pin MiniSO-8 package (3.0 × 4.9 mm, 0.65 mm pitch), offering improved thermal performance (RthJA = 190 °C/W) and board-area efficiency over standard SO-8.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Out1) | Amplifier 1 output | Delivers rail-to-rail buffered signal; requires local 10 nF decoupling to VCC for stability in high-Z sensor interfaces. |
| 2 (In1−) | Amplifier 1 inverting input | High-impedance node (1 pA bias); sensitive to PCB leakage-must be guarded and kept short in proximity sensor layouts. |
| 3 (In1+) | Amplifier 1 non-inverting input | Accepts rail-to-rail common-mode signals; used for reference-biased sensor inputs (e.g., thermistor dividers). |
| 4 (VCC−) | Negative supply / ground | Return path for both amplifiers; must connect directly to low-impedance ground plane to maintain CMRR and noise immunity. |
| 5 (VCC+) | Positive supply | Accepts 1.5–5.5 V; requires 10 nF ceramic capacitor placed <1 mm from pin to suppress supply-induced distortion. |
| 6 (In2+) | Amplifier 2 non-inverting input | Independent high-Z input for dual-sensor architectures (e.g., differential smoke chamber detection). |
| 7 (In2−) | Amplifier 2 inverting input | Supports active filtering or transimpedance configuration when paired with Out2 (Pin 8). |
| 8 (Out2) | Amplifier 2 output | Provides second independent rail-to-rail output; enables dual-channel signal conditioning without discrete op-amp duplication. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input and output | Enables full utilization of 1.5 V supply headroom-critical for single-cell battery systems where every millivolt counts. |
| 10 µA supply current per amplifier | Reduces total quiescent power to 21 µW per channel at 2.1 V, extending battery life in maintenance-free IoT endpoints. |
| Stable at gain ≥5 V/V | Eliminates need for external compensation components in standard non-inverting configurations, simplifying layout and BOM. |
| 1 pA typical input bias current | Permits direct connection to high-impedance sources (e.g., pyroelectric sensors, pH electrodes) without signal attenuation. |
| -40 to 85 °C operating range | Validated for deployment in automotive cabin modules, industrial control panels, and outdoor environmental monitors. |
Applications
| Smoke Detector Signal Chain | Proximity Sensor Front-End |
|---|---|
|
Use Scenario: Amplifying weak current from ionization chamber or optical scatter detector in battery-powered residential smoke alarms. IC Role / Device Role / Timing Role: Dual-channel transimpedance and filtering amplifier-Out1 conditions chamber signal, Out2 buffers reference path for ratiometric correction. Use Value: 1 pA input bias prevents signal loss across megaohm feedback resistors; rail-to-rail output drives 12-bit SAR ADC input fully, maximizing SNR. |
Use Scenario: Converting capacitance shift from touch or proximity electrode into clean voltage for microcontroller ADC sampling. IC Role / Device Role / Timing Role: High-impedance buffer and gain stage for capacitive sensing IC output or self-capacitance measurement circuit. Use Value: Ultra-low input bias avoids charge injection errors; 450 kHz GBP supports fast response (<2.2 µs settling) for gesture recognition. |
| Portable Medical Pulse Oximeter | Active Low-Pass Filter for Wearables |
|
Use Scenario: Amplifying low-amplitude, low-frequency photoplethysmography (PPG) signals from red/IR LEDs in wrist-worn health monitors. IC Role / Device Role / Timing Role: First-stage instrumentation amplifier with rail-to-rail output driving ADC input; dual channel supports simultaneous red/IR path processing. Use Value: 800 µV max Vos ensures DC-coupled PPG baseline stability; 10 µA current enables multi-day continuous monitoring on coin cell. |
Use Scenario: Implementing 2nd-order Sallen-Key low-pass filter (fc ≈ 10 Hz) to suppress motion artifact in accelerometer-based activity trackers. IC Role / Device Role / Timing Role: Unity-gain stable buffer and filter integrator-configured as dual-op-amp topology with precise resistor ratio matching. Use Value: Guaranteed stability at gain ≥5 V/V allows robust filter Q-factor control; low noise (105 nV/√Hz) preserves signal fidelity below 10 Hz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-power rail-to-rail op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP6022-E/SN | Higher supply current (100 µA vs. 10.5 µA), wider supply range (2.7–5.5 V), no guaranteed rail-to-rail input below 2.7 V. | Not suitable for 1.5 V alkaline or single-LiFePO₄ operation; better for 3.3 V systems needing higher drive strength. | Select if >1 mA output current required or if supply is fixed at 3.3 V with less stringent battery life targets. |
| LMV358IDR | Rail-to-rail output only (not input), higher Vos (3 mV max), 80 µA supply current, no guaranteed stability at gain <10 V/V. | Limited common-mode range restricts use with low-side current sensing or single-supply photodiode amps requiring Vcm near GND. | Choose only for cost-sensitive 3.3/5 V applications where input rail-to-rail capability is not required and Vos tolerance >2 mV is acceptable. |
Compared with MCP6022-E/SN and LMV358IDR, TSV6192IST uniquely combines 1.5 V operation, 1 pA input bias, and rail-to-rail I/O in MiniSO-8-making it the sole option for ultra-low-power, high-impedance, single-cell sensor nodes demanding precision and longevity.
Availability
TSV6192IST is available at Aetrix Electronics and suitable for battery-powered applications, smoke detectors, and portable medical instrumentation requiring stable component supply across extended temperature and voltage ranges.
Supply support for TSV6192IST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and sensor solutions for industrial, automotive, and consumer markets.
The TSV619x series belongs to ST's precision low-power analog portfolio, engineered specifically for energy-constrained sensor interface and signal conditioning applications where rail-to-rail operation and nanoampere-level bias currents are mandatory.
FAQ
What is the minimum recommended gain for stable operation of TSV6192IST?
The TSV6192IST requires a closed-loop gain of at least 5 V/V (non-inverting) or -4 V/V (inverting) to ensure 60° phase margin and prevent oscillation. This is verified with 10 kΩ feedback/load and 20 pF capacitive load per the datasheet's stability test condition. Gains below this threshold risk instability and should be avoided.
Can TSV6192IST operate from a 1.5 V alkaline battery throughout its discharge curve?
Yes. The TSV6192IST is fully specified from 1.5 V to 5.5 V and functions across the entire alkaline battery discharge range (1.5 V down to ~0.9 V). Electrical characteristics-including GBP (380 kHz min), Vos (≤2 mV), and output swing-are guaranteed at 1.5 V, enabling reliable operation until battery depletion.
Does TSV6192IST support rail-to-rail input common-mode voltage at 1.5 V supply?
Yes. At 1.5 V supply, the input common-mode range extends from -0.1 V to +1.6 V relative to VCC−, covering the full rail-to-rail span. Performance metrics (CMRR, Vos) remain within spec across this range, with only minor degradation observed near the NMOS/PMOS input pair transition point (~0.8 V).
What decoupling is required for stable TSV6192IST operation?
A 10 nF X7R ceramic capacitor must be placed within 1 mm of Pins 4 (VCC−) and 5 (VCC+), connected directly to low-inductance ground and supply planes. This suppresses high-frequency supply noise that degrades THD+N and prevents oscillation due to parasitic inductance in long supply traces.
TSV6192IST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.08V/µs
- Gain Bandwidth Product:
- 450 kHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 1 pA
- Voltage - Input Offset:
- 4 mV
- Current - Supply:
- 10.5µA
- Current - Output / Channel:
- 63 mA
- Voltage - Supply Span (Min):
- 1.5 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MiniSO
TSV6192IST FAQ
1.How can I place an order for TSV6192IST through Aetrix?
Please submit a Request for Quotation (RFQ) for TSV6192IST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSV6192IST reliable?
The price and inventory of TSV6192IST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSV6192IST is usually 5 days.
3.What payment methods are accepted for TSV6192IST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSV6192IST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSV6192IST?
TSV6192IST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSV6192IST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSV6192IST?
For technical support, including TSV6192IST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSV6192IST requirements.
6.How does Aetrix verify that TSV6192IST is sourced from the original manufacturer or authorized distributors?
All TSV6192IST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSV6192IST meets industry standards.
7.What is the process for return or replacement of TSV6192IST?
All TSV6192IST units undergo pre-shipment inspection (PSI). If there is an issue with TSV6192IST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSV6192IST part is unused and in its original packaging.
Return procedure for TSV6192IST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TSV6192IST Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

