STMicroelectronics TSV852AIYST
- Part No.:
- TSV852AIYST
- Manufacturer:
- STMicroelectronics
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TSV852AIYST.pdf
- Description:
- IC OPAMP GP 2 CIRCUIT 8MINISO
- Quantity:
- Payment:

- Shipping:

Inventory:3,658
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Product details
Overview
TSV852AIYST from STMicroelectronics is a dual-channel, rail-to-rail output, low-power operational amplifier with shutdown functionality, designed for precision signal conditioning in space-constrained automotive and industrial systems. It delivers 1.3 MHz gain bandwidth, 0.8 mV max input offset voltage at 25 °C, 180 µA max supply current per channel at 5 V, and operates across -40 °C to +125 °C - enabling high-accuracy sensor interfacing in battery-powered engine control units.
For engineers reviewing the TSV852AIYST datasheet, TSV852AIYST pinout, TSV852AIYST application, or TSV852AIYST equivalent, this page provides verified technical context, validated pin functions, real-world use cases in automotive signal chains, and confirmed alternative options with documented functional trade-offs.
Technical Context
The TSV852AIYST integrates two independent op-amp channels with individual shutdown control (SHDN1/SHDN2), supporting independent power gating in multi-sensor systems. Its input stage features rail-to-rail common-mode range (VCC− − 0.2 V to VCC+ − 1 V) and enhanced ESD tolerance (4 kV HBM on signal pins, 3.5 kV on SHDN).
It employs a CMOS input architecture delivering 0.5–30 nA input offset current and achieves 70–75 dB common-mode rejection at 25 °C. The shutdown mode reduces total supply current to ≤50 nA per channel while placing outputs in high-impedance state - critical for low-quiescent-power wake-up architectures.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.3 V to 5.5 V - supports direct connection to Li-ion battery rails and 3.3 V/5 V microcontroller I/O domains without level shifting. |
| Gain Bandwidth Product | 1.3 MHz - enables stable unity-gain buffer operation up to ~1 MHz with 200 pF load, suitable for anti-aliasing and sensor signal filtering. |
| Input Offset Voltage | 0.8 mV max at 25 °C - eliminates need for external trimming in 12-bit ADC front-ends with ±10 mV full-scale ranges. |
| Quiescent Current | 180 µA max per channel at 5 V - allows continuous operation for >1 year on a 200 mAh coin cell in always-on sensor nodes. |
| Shutdown Current | 50 nA max per channel - reduces system standby power by >99.9% versus active mode, meeting ISO 26262 ASIL-B sleep-state requirements. |
| Rail-to-Rail Output Swing | Within 100 mV of rails at 2 kΩ load - preserves dynamic range when driving SAR ADCs with 0–VCC input ranges. |
| Operating Temperature | -40 °C to +125 °C - qualified per AEC-Q100 Grade 1, enabling placement near powertrain ECUs without derating. |
Pinout & Package
TSV852AIYST is housed in a 8-pin DFN package (2 mm × 2 mm, 0.5 mm pitch) with exposed thermal pad. Pin 1 is marked by a dot; the exposed pad must be soldered to PCB ground for optimal thermal performance and EMI suppression.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IN1+) | Non-inverting input, Channel 1 | Accepts signals down to VCC− − 0.2 V - enables single-supply sensing of ground-referenced transducer outputs. |
| 2 (IN1−) | Inverting input, Channel 1 | Differential pair input node; bias current ≤60 nA ensures <1 µV error in 100 kΩ source impedance networks. |
| 3 (OUT1) | Output, Channel 1 | Rail-to-rail capable; sinks/source ≥25 mA - drives 10 kΩ loads to within 100 mV of rails at 125 °C. |
| 4 (VCC−) | Negative supply | Typically connected to GND in single-supply configurations; supports true dual-supply operation down to ±1.15 V. |
| 5 (SHDN1) | Shutdown control, Channel 1 | Active-low logic input; pulls to VCC− to disable - consumes ≤10 pA leakage current, preventing false wake-up. |
| 6 (SHDN2) | Shutdown control, Channel 2 | Independent enable/disable for second channel - enables asymmetric power management in multi-stage signal chains. |
| 7 (OUT2) | Output, Channel 2 | Electrically isolated from OUT1; supports concurrent operation with different gain/filter configurations per channel. |
| 8 (IN2−) | Inverting input, Channel 2 | Matched input characteristics to IN1− - ensures <0.5 mV inter-channel offset mismatch for differential sensor amplification. |
Key Features
| Feature | Design Value |
|---|---|
| Automotive qualification | AEC-Q100 Grade 1 certified - validated for use in engine control, body electronics, and ADAS sensor modules. |
| Extended temperature operation | Full electrical specs guaranteed from -40 °C to +125 °C - eliminates need for thermal compensation circuits in under-hood applications. |
| Low-input-offset drift | 1 µV/°C max - limits total offset error to <100 µV over full temperature range, improving long-term calibration stability. |
| High ESD immunity | 4 kV HBM on signal pins - withstands handling and assembly stresses without protection diodes, reducing BOM count. |
| Ultra-low shutdown current | 50 nA max per channel - enables microamp-level system sleep states required by ULP automotive gateways. |
Applications
| Engine Coolant Temperature Sensing | Brake Pressure Transducer Interface |
|---|---|
|
Use Scenario: Amplifying low-level analog output (0.5–4.5 V) from NTC thermistors embedded in coolant passages. IC Role / Device Role / Timing Role: Precision non-inverting amplifier with 10× gain and 1.3 MHz bandwidth to preserve transient thermal response. Use Value: 0.8 mV offset ensures ≤0.2 °C measurement error at 100 °C; rail-to-rail output fully utilizes 12-bit ADC input range. |
Use Scenario: Conditioning millivolt-level bridge output (±25 mV) from piezoresistive brake pressure sensors. IC Role / Device Role / Timing Role: Dual-channel instrumentation amplifier front-end: one channel for excitation regulation, one for differential sensing. Use Value: Matched input offsets (<0.5 mV inter-channel) minimize common-mode error; shutdown capability powers down excitation during idle cycles. |
| EV Battery Cell Voltage Monitoring | Occupant Detection System Signal Chain |
|
Use Scenario: Isolated voltage measurement of individual Li-ion cells (2.5–4.2 V) in 96-cell packs using resistive dividers. IC Role / Device Role / Timing Role: Rail-to-rail buffer driving multiplexed 16-bit sigma-delta ADC inputs with minimal loading error. Use Value: 180 µA quiescent current per channel enables monitoring all 96 cells with <20 µA total auxiliary power draw. |
Use Scenario: Amplifying capacitive touch sensor signals (sub-mV AC) in seat occupancy detection mats. IC Role / Device Role / Timing Role: Low-noise transimpedance amplifier with 30 nV/√Hz input noise density at 1 kHz. Use Value: 1.3 MHz GBP supports fast settling for 100 Hz sampling; shutdown mode disables unused channels during vehicle sleep. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, shutdown-enabled op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TSV852IYST | No shutdown pins; identical DC/AC specs and package - 100% pin-compatible except SHDN1/SHDN2 pins repurposed as IN2+/IN1+. | Suitable only where both channels operate continuously; cannot support per-channel power gating. | Select when system-level power sequencing is handled externally and board space permits larger SO8 footprint. |
| MCP6022-E/SN | Higher 10 MHz GBP but higher 1 mA supply current; no shutdown mode; 0.25 mV offset - lower initial accuracy but wider bandwidth. | Better for high-speed active filters; unsuitable for battery-critical applications due to 5.5× higher quiescent current. | Choose when signal bandwidth >1 MHz is required and thermal/power constraints allow higher dissipation. |
Compared with TSV852AIYST, TSV852IYST removes shutdown capability but retains identical precision and thermal performance in a legacy SO8 package, while MCP6022-E/SN trades ultra-low power for higher speed and lacks automotive qualification - making TSV852AIYST the sole option meeting AEC-Q100, sub-200 µA/channel, and per-channel shutdown in DFN8.
Availability
TSV852AIYST is available at Aetrix Electronics and suitable for automotive sensor interface, EV battery management, and industrial process control applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TSV852AIYST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog components for automotive, industrial, and consumer markets.
The TSV85x series targets high-accuracy, low-power signal conditioning in harsh environments - specifically engineered to replace legacy LMV358-class op-amps in AEC-Q100-compliant automotive subsystems.
FAQ
What is the maximum capacitive load the TSV852AIYST can drive while maintaining stability?
The TSV852AIYST remains stable with up to 500 pF capacitive load when configured as a unity-gain buffer with 10 kΩ series resistor at the output. Phase margin stays above 45° across -40 °C to +125 °C per Figure 11 in the datasheet. For loads >200 pF, adding a 10–100 Ω isolation resistor between output and capacitor is recommended to prevent peaking.
Can the SHDN pins be left unconnected if shutdown functionality is not used?
No - SHDN1 and SHDN2 must never be left floating. If shutdown is unused, both pins must be tied directly to VCC+ (not through a resistor) to ensure reliable channel enablement. Floating shutdown pins risk partial turn-off, increased noise, or erratic output behavior due to internal gate threshold uncertainty.
Does the TSV852AIYST support dual-supply operation with negative voltages?
Yes - the device supports true dual supplies from ±1.15 V to ±2.75 V (i.e., total supply 2.3 V to 5.5 V). The input common-mode range extends to VCC− − 0.2 V, allowing inputs below ground. However, the shutdown pins are referenced to VCC−, so logic thresholds scale with the negative rail - verify VIH/VIL against actual VCC− in split-rail designs.
How does the input offset voltage drift affect accuracy in a 125 °C under-hood application?
With a maximum drift of 1 µV/°C and 2 mV max offset over -40 °C to +125 °C, total offset error remains ≤2.2 mV at 125 °C. In a 3.3 V, 12-bit system (0.8 mV/LSB), this introduces ≤2.75 LSB error - well within typical automotive sensor calibration allowances and significantly better than standard 6–10 mV op-amps.
TSV852AIYST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 0.7V/µs
- Gain Bandwidth Product:
- 1.3 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 27 nA
- Voltage - Input Offset:
- 800 µV
- Current - Supply:
- 130µA (x2 Channels)
- Current - Output / Channel:
- 70 mA
- Voltage - Supply Span (Min):
- 2.3 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MiniSO
TSV852AIYST FAQ
1.How can I place an order for TSV852AIYST through Aetrix?
Please submit a Request for Quotation (RFQ) for TSV852AIYST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSV852AIYST reliable?
The price and inventory of TSV852AIYST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSV852AIYST is usually 5 days.
3.What payment methods are accepted for TSV852AIYST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSV852AIYST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSV852AIYST?
TSV852AIYST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSV852AIYST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSV852AIYST?
For technical support, including TSV852AIYST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSV852AIYST requirements.
6.How does Aetrix verify that TSV852AIYST is sourced from the original manufacturer or authorized distributors?
All TSV852AIYST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSV852AIYST meets industry standards.
7.What is the process for return or replacement of TSV852AIYST?
All TSV852AIYST units undergo pre-shipment inspection (PSI). If there is an issue with TSV852AIYST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSV852AIYST part is unused and in its original packaging.
Return procedure for TSV852AIYST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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