My Inquiry
My Account
Texas Instruments TUSB2040AN
- Part No.:
- TUSB2040AN
- Manufacturer:
- Texas Instruments
- Category:
- Controllers
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
TUSB2040AN.pdf
- Description:
- IC USB 4-PORT HUB 28-DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,884
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TUSB2040AN from Texas Instruments is a 3.3-V USB 1.0-compliant 4-port hub IC with integrated transceivers, supporting full-speed (12 Mbps) and low-speed (1.5 Mbps) downstream operation, 48-MHz crystal/oscillator clock input, and optional serial EEPROM interface for programmable VID/PID. It serves as a root-attached or tiered hub in embedded host systems requiring bus-powered or self-powered topology with ganged/per-port power switching.
For engineers reviewing the TUSB2040AN datasheet, TUSB2040AN pinout, TUSB2040AN application, or TUSB2040AN equivalent, key selection considerations include USB 1.0 compliance, 28-pin DIP package compatibility, EXTMEM-configurable EEPROM interface, suspend/resume support, and overcurrent reporting via four dedicated OVRCUR inputs.
Technical Context
The TUSB2040AN implements a USB 1.0 hub repeater architecture with integrated SIE logic, frame timing, suspend/resume control, and port power management coordination. Its upstream DP0/DM0 and four downstream DP1–DP4/DM1–DM4 transceivers operate at 3.3 V with differential receiver common-mode range of 0.8–2.5 V and driver output impedance of 7.1–19.9 Ω.
Power mode selection (bus- vs. self-powered) and overcurrent handling (ganged vs. per-port) are controlled via BUSPWR/SCL and GANGED/SDA pins when EXTMEM = 0, or loaded from external M93C46 EEPROM when EXTMEM = 1. The device draws 100 mA in normal operation and only 1 µA in suspend mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| USB Compliance | USB Specification 1.0 compliant; supports enumeration, transaction scheduling, and hub descriptor reporting. |
| Port Count & Speed | 1 upstream + 4 downstream ports; each downstream port auto-negotiates full-speed (12 Mbps) or low-speed (1.5 Mbps). |
| Supply Voltage | 3.3 V nominal (3.0–3.6 V); absolute max 3.8 V; enables direct interface with 3.3-V logic without level shifting. |
| Clock Input | 48-MHz single-ended crystal/oscillator input (XTAL1); XTAL2 provides feedback path or open for oscillator use. |
| Power Management | Supports bus-powered (≤500 mA from VBUS) and self-powered (local 5-V supply) modes with ganged or per-port PWRON/OVRCUR control. |
| EEPROM Interface | Optional tri-state I²C-compatible interface (SCL/SDA on pins 9/10) enabled by EXTMEM = 1; requires M93C46 or equivalent with auto-increment address. |
| Suspend Current | 1 µA typical; enables low-power system sleep states while retaining hub configuration and upstream link readiness. |
Pinout & Package
Available in 28-pin plastic DIP (N package), 0.6-inch width, JEDEC MS-011 compliant. Pin 1 is top-left corner (notch side), pin 28 is bottom-right.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DP0) | Upstream differential data plus | Connects to host controller's upstream DP; forms USB 1.0-compliant differential pair with DM0 (pin 2). |
| 2 (DM0) | Upstream differential data minus | Paired with DP0; requires 90-Ω differential trace routing and series termination per USB spec. |
| 4–5, 7–8, 11–12, 14–16 (DP1–DP4 / DM1–DM4) | Downstream differential data plus/minus | Four independent USB port pairs; each supports full/low-speed auto-detection and slew-rate control. |
| 9 (BUSPWR/SCL) | Power source select / EEPROM clock | When EXTMEM = 0: active-low bus/self-power indicator; when EXTMEM = 1: TTL-level SCL output to EEPROM. |
| 10 (GANGED/SDA) | Power mode select / EEPROM data | When EXTMEM = 0: selects ganged/per-port overcurrent handling; when EXTMEM = 1: bidirectional SDA line with 100 µA internal pulldown. |
| 21 (EXTMEM) | EEPROM interface enable | High = enable EEPROM read at power-up; low = disable EEPROM, configure pins 9/10 as BUSPWR/GANGED. |
| 3, 1, 26, 19 (OVRCUR1–OVRCUR4) | Overcurrent indicator inputs | Active-low TTL inputs; each monitors one downstream port's overcurrent condition; tied together in ganged mode. |
| 2, 28, 25, 20 (PWRON1–PWRON4) | Port power control outputs | Active-low open-drain outputs driving external power switches (e.g., TPS2014); all toggle simultaneously in ganged mode. |
Key Features
| Feature | Design Value |
|---|---|
| USB 1.0 Hub Repeater Logic | Full protocol handling including SOF generation, transaction translation, and hub descriptor responses without external microcontroller. |
| Auto-Speed Detection | Each downstream port dynamically configures slew rate and receiver thresholds for full-speed (12 Mbps) or low-speed (1.5 Mbps) devices. |
| Ganged vs. Per-Port Power Control | Selectable via hardware pins-enables cost-optimized (ganged) or fault-isolated (per-port) power architectures. |
| Low-Power Suspend Mode | 1 µA quiescent current with SUSPND pin assertion; maintains upstream link state and enables fast resume (<10 ms). |
| Configurable VID/PID via EEPROM | Supports custom vendor/product IDs stored in external M93C46; eliminates need for firmware updates during production programming. |
| Integrated Transceiver Protection | Differential receivers tolerate common-mode range 0.8–2.5 V; drivers meet USB 1.0 eye diagram and impedance specs (7.1–19.9 Ω). |
Applications
| Embedded Industrial Controller Hub | USB Peripheral Expansion Dock |
|---|---|
Use Scenario: A PLC-based industrial controller adds four USB peripherals (HID keyboard, serial adapter, flash drive, sensor interface) via a compact, self-powered hub. IC Role / Device Role / Timing Role: TUSB2040AN acts as tier-1 hub, managing upstream bandwidth allocation, port power sequencing, and overcurrent isolation between field devices. Use Value: Enables deterministic USB connectivity in EMI-noisy environments using ganged power switching and 3.3-V logic compatibility with controller FPGA I/O banks. |
Use Scenario: A desktop docking station provides four downstream USB 1.0 ports for legacy peripherals (printer, scanner, mouse, storage) alongside video/audio interfaces. IC Role / Device Role / Timing Role: TUSB2040AN serves as bus-powered hub, drawing ≤500 mA from host PC while delivering 100 mA/port to low-power devices. Use Value: Eliminates need for separate power brick; leverages EXTMEM=0 configuration for fixed PID and simplified BOM with no EEPROM component. |
| Medical Diagnostic Equipment Interface | Point-of-Sale Terminal Hub |
Use Scenario: A portable ultrasound machine integrates USB for probe firmware updates, DICOM image export, and peripheral attachment (keyboard, barcode scanner). IC Role / Device Role / Timing Role: TUSB2040AN operates in self-powered mode with individual port overcurrent protection to prevent system-wide shutdown during probe hot-swap events. Use Value: Ensures clinical uptime by isolating faults to single ports; suspend/resume support preserves imaging session state during brief cable disconnects. |
Use Scenario: A retail POS terminal connects cash drawer, receipt printer, customer display, and magnetic stripe reader via a compact, cost-sensitive hub. IC Role / Device Role / Timing Role: TUSB2040AN functions as bus-powered hub with ganged PWRON control, reducing external component count and PCB area. Use Value: Lowers bill-of-materials cost through shared power switch IC (TPS2014) and eliminates EEPROM programming step in high-volume manufacturing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB 1.0 hub applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TUSB2040 | Pin-to-pin compatible; lacks EXTMEM pin and EEPROM interface; fixed VID/PID (0x0403/0x6001) and hardwired BUSPWR/GANGED logic. | Requires no external EEPROM; suitable only for designs needing generic hub ID and static power configuration. | Select TUSB2040 when VID/PID customization and flexible power mode selection are unnecessary. |
| TUSB2140A | 4-port hub with I²C interface (not EEPROM); supports dynamic VID/PID reprogramming; includes integrated 1.5-kΩ pull-up resistors on downstream ports. | Enables field-upgradable descriptors and reduces external passive count; requires I²C master controller instead of passive EEPROM. | Choose TUSB2140A for systems needing post-deployment descriptor updates or simplified downstream port routing. |
Compared with TUSB2040 and TUSB2140A, the TUSB2040AN offers hardware-selectable EEPROM configuration without requiring an I²C host, making it optimal for cost-sensitive, fixed-function hubs where initial VID/PID programming suffices and layout simplicity is prioritized.
Availability
TUSB2040AN is available at Aetrix Electronics and suitable for embedded industrial controllers, USB peripheral expansion docks, and medical diagnostic equipment requiring stable component supply and long-term design continuity.
Supply support for TUSB2040AN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with decades of USB interface IP development and manufacturing excellence.
The TUSB2040AN belongs to TI's legacy USB 1.0 hub family, designed specifically for cost-effective, low-power, and space-constrained embedded systems requiring plug-and-play USB peripheral expansion without microcontroller dependency.
FAQ
What USB specification version does the TUSB2040AN support?
The TUSB2040AN fully complies with Universal Serial Bus Specification Revision 1.0. It implements all required hub descriptor reporting, transaction translation, SOF generation, and suspend/resume signaling defined in that standard. It does not support USB 2.0 or later versions, and its maximum data rate is limited to 12 Mbps (full-speed) or 1.5 Mbps (low-speed) per downstream port.
How is the EEPROM interface configured on the TUSB2040AN?
The EEPROM interface on the TUSB2040AN is enabled by pulling EXTMEM (pin 21) high at power-up. When enabled, pins 9 (BUSPWR/SCL) and 10 (GANGED/SDA) become TTL-level SCL and bidirectional SDA lines, respectively, with 100 µA internal pulldowns. The device performs a one-time read of three 16-bit words (BUSPWR/GANGED flags, VID, PID) from an M93C46 or equivalent EEPROM with auto-increment addressing.
Does the TUSB2040AN require an external clock source?
Yes, the TUSB2040AN requires an external 48-MHz clock signal applied to XTAL1 (pin 23). This can be provided by a crystal (with XTAL2 as feedback), a ceramic resonator, or a TTL-compatible oscillator (XTAL2 left open). The 48-MHz clock is essential for USB bit timing - it is divided internally to generate the 12-MHz USB frame clock and sample upstream data.
What are the power supply requirements for the TUSB2040AN?
The TUSB2040AN operates from a single 3.3-V supply (VCC, pins 13 and 27) with recommended range 3.0–3.6 V and absolute maximum 3.8 V. It draws 100 mA during active operation and only 1 µA in suspend mode. The device supports both bus-powered (5-V VBUS-derived) and self-powered (local 5-V supply) configurations, managed via the BUSPWR input or EEPROM-stored setting.
Can the TUSB2040AN be used in ganged versus per-port overcurrent protection modes?
Yes, the TUSB2040AN supports both ganged and per-port overcurrent protection. When EXTMEM = 0, the GANGED/SDA pin selects mode: low = ganged (all PWRON outputs toggle together; any OVRCUR input triggers shutdown), high = per-port (each PWRON responds independently to its OVRCUR input). In EEPROM mode (EXTMEM = 1), these settings are stored in the EEPROM memory map at address 0x00000.
TUSB2040AN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Programmable:
- Not Verified
- Protocol:
- -
- Function:
- -
- Interface:
- -
- Standards:
- -
- Voltage - Supply:
- -
- Current - Supply:
- -
- Operating Temperature:
- -
- Supplier Device Package:
- 28-PDIP
- Grade:
- -
- Qualification:
- -
TUSB2040AN FAQ
1.How can I place an order for TUSB2040AN through Aetrix?
Please submit a Request for Quotation (RFQ) for TUSB2040AN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TUSB2040AN reliable?
The price and inventory of TUSB2040AN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TUSB2040AN is usually 5 days.
3.What payment methods are accepted for TUSB2040AN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TUSB2040AN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TUSB2040AN?
TUSB2040AN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TUSB2040AN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TUSB2040AN?
For technical support, including TUSB2040AN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TUSB2040AN requirements.
6.How does Aetrix verify that TUSB2040AN is sourced from the original manufacturer or authorized distributors?
All TUSB2040AN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TUSB2040AN meets industry standards.
7.What is the process for return or replacement of TUSB2040AN?
All TUSB2040AN units undergo pre-shipment inspection (PSI). If there is an issue with TUSB2040AN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TUSB2040AN part is unused and in its original packaging.
Return procedure for TUSB2040AN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TUSB2040AN Tags
-
PTN5150AHXMP
NXP Semiconductors
-
USB3740B-AI9-TR
Microchip Technology
-
USB3740B-AI2-TR
Microchip Technology
-
USB3300-EZK-TR
Microchip Technology
-
USB3300-EZK
Microchip Technology
-
FUSB340TMX
onsemi
-
FUSB302BMPX
onsemi
-
DP83826IRHBR
Texas Instruments
-
MCP2518FDT-E/QBB
Microchip Technology
-
FUSB302MPX
onsemi
-
MCP2518FDT-E/SL
Microchip Technology
-
FT260Q-R
FTDI, Future Technology Devices International Ltd
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
