Renesas TW2984-NA2-CR
- Part No.:
- TW2984-NA2-CR
- Manufacturer:
- Renesas
- Category:
- Encoders, Decoders, Converters
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
TW2984-NA2-CR.pdf
- Description:
- IC VIDEO DECODER 68QFN
- Quantity:
- Payment:

- Shipping:

Inventory:721
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Product details
Overview
TW2984-NA2-CR from Intersil is a 4-channel WD1 (960H)/D1-compatible video decoder and audio codec IC, integrating four 10-bit analog-to-digital converters, adaptive 4-H comb filters, digital sub-carrier and horizontal PLLs, and five audio ADCs plus one DAC. It supports NTSC/PAL auto-detection, ITU-R BT.656 YCbCr 4:2:2 output at 36/72/144 MHz (WD1) or 27/54/108 MHz (D1), and operates from 1.0V core and 3.3V I/O/analog supplies.
For engineers reviewing the TW2984-NA2-CR datasheet, TW2984-NA2-CR pinout, TW2984-NA2-CR application, or TW2984-NA2-CR equivalent, key selection considerations include its quad-channel CVBS decoding capability, programmable gain and white peak control per channel, integrated clock PLL with 27 MHz crystal input, 8 mm × 8 mm 68-pin QFN package, and dual-mode I²S/DSP audio interface supporting 8–48 kHz sampling.
Technical Context
The TW2984-NA2-CR implements a fully programmable analog front end per channel with built-in anti-alias filtering, clamping, and static/AGC gain control for Y, plus white peak control for CVBS. Its video processing path includes 4-H adaptive comb filtering, PAL delay line color phase correction, peaking, CTI, and digital sub-carrier PLL for precise chroma demodulation.
Digital timing is anchored by independent horizontal and sub-carrier PLLs supporting NTSC-M (3.579545 MHz), PAL-BDGHI (4.433619 MHz), and PAL-M/N variants; the integrated clock PLL generates 36/72/144 MHz (WD1) or 27/54/108 MHz (D1) pixel clocks from a single 27 MHz crystal. Audio subsystem provides five simultaneous ADC inputs, one DAC, and configurable I²S/DSP master/slave operation with programmable sample rates.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Video Channels | 4 independent CVBS inputs with per-channel programmable decoding mode (WD1 or D1) |
| ADC Resolution | 10-bit resolution per video channel, enabling 1024-level luminance/chroma digitization |
| Output Format | ITU-R BT.656 YCbCr 4:2:2 parallel output at 36/72/144 MHz (WD1) or 27/54/108 MHz (D1) |
| Audio Interfaces | I²S/DSP master or slave mode with 8/16/32/44.1/48 kHz sample rate support and 8/16-bit PCM or μ-Law/A-Law encoding |
| Power Supplies | Separate 1.0 V (core logic), 3.3 V (I/O, analog video, analog audio, PLL) rails with defined current draw (e.g., 80 mA analog video supply) |
| Crystal Input | Single 27 MHz fundamental-mode crystal (±50 ppm tolerance, 18 pF load, 50 Ω ESR) drives all video/audio timing |
| Package | 68-pin QFN, 8 mm × 8 mm, 0.4 mm pitch, RoHS-compliant matte tin (e3) termination |
Pinout & Package
Package: 68-pin QFN, 8 mm × 8 mm, 0.4 mm pitch, exposed thermal pad (Q68.8x8B). Pin functions validated per FN8583 Rev.0.00 datasheet pages 6–8.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1–VIN4 | Analog video input | Four independent composite video inputs (CVBS), each with dedicated 10-bit ADC and clamping circuit |
| AIN1–AIN5 | Analog audio input | Five single-ended audio channels with AC-coupled input range (0.21–2.4 Vpp) |
| VD[7:0] | Digital video output | 8-bit parallel YCbCr 4:2:2 data bus synchronized to CLKPO/CLKNO for WD1/D1 time-multiplexed output |
| ACLKR/ASYNR/ADATR | Audio record interface | I²S/DSP record path: serial clock, sync, and data outputs supporting up to 48 kHz sampling |
| ACLKP/ASYNP/ADATP | Audio playback interface | I²S/DSP playback path: serial clock, sync, and data inputs for DAC-driven output |
| RSTB | Active-low reset | Asynchronous system reset; must be held low ≥100 ns after power stabilization |
| XTI/XTO | Clock oscillator interface | 27 MHz crystal connection points; XTI accepts external clock if crystal omitted |
| CLKPO/CLKNO | Programmable clock outputs | Differential or single-ended pixel clock outputs (36/72/144 MHz or 27/54/108 MHz) for video timing synchronization |
| SCLK/SDAT/SADD[1:0] | Two-wire MPU interface | Standard I²C-compatible host control bus (up to 400 kHz) with 2-bit address for multi-device configuration |
| IRQ | Interrupt request | Open-drain output signaling video loss, standard change, AGC saturation, or register-access completion |
Key Features
| Feature | Design Value |
|---|---|
| Per-channel WD1/D1 format selection | Each of four video channels independently configured for 960H (1280×480) or D1 (720×480/576) decoding |
| Adaptive 4-H comb filter | Real-time Y/C separation with motion-adaptive algorithm minimizing dot crawl and cross-luminance artifacts |
| Digital sub-carrier PLL | Locks to NTSC/PAL subcarrier frequencies (3.579–4.434 MHz) with ±450 Hz capture range for stable color decoding |
| Integrated clock PLL | Generates all required video/audio clocks (36–144 MHz) from single 27 MHz crystal-eliminates external clock generators |
| Multi-standard auto-detection | Automatic recognition of NTSC-M/4.43 and PAL-B/D/G/H/I/M/N/60 without host intervention |
| Programmable video enhancement | Independent control of peaking, CTI, hue, brightness, saturation, contrast, and sharpness per channel |
Applications
| Security DVR Systems | Automotive Rear-View Camera Multiplexing |
|---|---|
Use Scenario: Simultaneous digitization and decoding of four analog CCTV camera feeds into a single digital video stream for H.264 encoding and network streaming. IC Role / Device Role / Timing Role: Primary video front-end IC performing analog-to-digital conversion, NTSC/PAL auto-detection, Y/C separation, and BT.656 formatting for SoC ingestion. Use Value: Enables 4× CVBS input consolidation with minimal board space using one 8 mm × 8 mm QFN, reducing BOM count versus discrete decoder solutions. |
Use Scenario: Aggregating video from backup camera, blind-spot monitor, and surround-view sensors into a central display unit in automotive infotainment systems. IC Role / Device Role / Timing Role: Quad-channel analog video receiver providing synchronized, standards-compliant digital video output compatible with automotive-grade video processors. Use Value: Supports mixed NTSC/PAL sources (e.g., global vehicle variants) with automatic format detection and robust weak-signal sync handling per channel. |
| Industrial Video Monitoring Hubs | Legacy Broadcast Signal Conversion |
Use Scenario: Centralized monitoring station receiving analog video from multiple factory-floor cameras, requiring real-time display and recording with minimal latency. IC Role / Device Role / Timing Role: High-fidelity video acquisition IC delivering 10-bit digitized YCbCr with programmable peaking/CTI for enhanced detail visibility in low-light industrial environments. Use Value: Delivers >10 MHz analog bandwidth and ±1 LSB INL/DNL for accurate representation of fine text and machine-readable markings. |
Use Scenario: Converting aging analog broadcast signals (NTSC, PAL) to digital baseband for archival digitization or modern IP-based distribution infrastructure. IC Role / Device Role / Timing Role: Standards-compliant video decoder preserving original luma/chroma fidelity while generating clean BT.656 output for downstream MPEG encoders. Use Value: Includes PAL delay line and digital sub-carrier PLL to correct legacy color phase errors and ensure broadcast-grade chroma accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad-channel analog video decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TW2864-NA2-CR | Lower-resolution 8-bit ADCs; no WD1 (960H) support; max 54 MHz D1 clock; lacks PAL delay line and advanced comb filtering | Targeted at cost-sensitive D1-only systems where 960H resolution and PAL color correction are not required | Select when budget constraints outweigh need for 960H resolution, PAL-N/M compatibility, or superior Y/C separation. |
| ADV7180BCPZ | Single-channel decoder; 10-bit ADC; supports NTSC/PAL but no WD1/D1 time-multiplexed output; outputs 8-bit ITU-R BT.656 only at 27 MHz | Requires four separate ICs to match TW2984-NA2-CR's 4-channel capability-increasing PCB area and power consumption | Choose only for designs needing single-channel flexibility, smaller footprint per channel, or ADI ecosystem integration. |
Compared with TW2984-NA2-CR, TW2864-NA2-CR reduces system cost but sacrifices 960H resolution, PAL color correction, and video quality features; ADV7180BCPZ offers higher per-channel SNR but forces 4× IC duplication, increasing layout complexity and total power over the integrated quad-channel solution.
Availability
TW2984-NA2-CR is available at Aetrix Electronics and suitable for security DVR systems, automotive rear-view camera multiplexing, industrial video monitoring hubs, and legacy broadcast signal conversion requiring stable component supply and long-term design continuity.
Supply support for TW2984-NA2-CR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Intersil (now part of Renesas Electronics) is a semiconductor company specializing in precision analog, power management, and video interface ICs for industrial, automotive, and communications markets.
The TW2984-NA2-CR belongs to Intersil's TW29xx family of multi-channel video decoders, designed specifically for high-density analog video acquisition in cost- and space-constrained embedded systems requiring WD1/D1 compatibility and multi-standard support.
FAQ
What video standards does the TW2984-NA2-CR support?
The TW2984-NA2-CR supports NTSC-M, NTSC-4.43, PAL-B, PAL-D, PAL-G, PAL-H, PAL-I, PAL-M, PAL-N, PAL-N combination, and PAL-60 with automatic format detection. It decodes both WD1 (960H) and D1 resolutions per channel, and includes PAL delay line and digital sub-carrier PLL for accurate color phase correction across all supported standards. The TW2984-NA2-CR datasheet confirms full compliance with ITU-R BT.656 timing and data format requirements.
Does the TW2984-NA2-CR require external clock generation?
No, the TW2984-NA2-CR integrates a clock PLL that generates all required video and audio clocks-including 36/72/144 MHz (WD1) or 27/54/108 MHz (D1) pixel clocks-from a single 27 MHz fundamental-mode crystal connected to XTI/XTO pins. This eliminates the need for external clock synthesizers or oscillators, simplifying system design and reducing BOM count. The TW2984-NA2-CR specification sheet explicitly states "Single 27MHz crystal for all standards and both WD1 and D1 format."
How many audio channels can the TW2984-NA2-CR process simultaneously?
The TW2984-NA2-CR integrates five audio ADCs and one audio DAC, enabling simultaneous digitization of five analog audio inputs (AIN1–AIN5) and mixed analog output via AOUT. Audio data is routed through configurable I²S/DSP master or slave interfaces supporting 8/16/32/44.1/48 kHz sample rates and 8/16-bit PCM or μ-Law/A-Law encoding. This capability is confirmed in the "Audio Codec" section of the TW2984-NA2-CR datasheet (FN8583 Rev.0.00, page 1).
What is the package type and thermal characteristics of the TW2984-NA2-CR?
The TW2984-NA2-CR uses an 8 mm × 8 mm, 68-pin QFN package (Q68.8x8B) with exposed thermal pad and 0.4 mm pitch. It operates across –40°C to +85°C ambient temperature, with maximum junction temperature rated at +125°C. Total supply current is 188 mA (80 mA VDDV + 21 mA VDDA + 5 mA VDDAPLL + 28 mA VDDO + 54 mA VDDI), and the device includes dedicated analog and digital ground planes (VSSV, VSSA, VSSAPLL, VSS) for noise isolation. These specifications are documented in the TW2984-NA2-CR Parametric Information section (pages 9–11).
Can the TW2984-NA2-CR decode video formats other than WD1 and D1?
No-the TW2984-NA2-CR is specifically designed for WD1 (960H) and D1 (720×480/576) analog video decoding only. It does not support CIF, QCIF, VGA, HDMI, SDI, or digital video inputs. Its analog front end, ADC sampling rates, and output timing are optimized for composite video (CVBS) signals conforming to ITU-R BT.601/BT.656 timing structures at those two resolutions. The TW2984-NA2-CR datasheet states "4-CH WD1 (960H)/D1 Compatible Video Decoders" as its primary function and lists no other video format support.
TW2984-NA2-CR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 68-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Obsolete
- Type:
- Video Decoder, Audio Codec
- Applications:
- Video
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 68-QFN (8x8)
TW2984-NA2-CR FAQ
1.How can I place an order for TW2984-NA2-CR through Aetrix?
Please submit a Request for Quotation (RFQ) for TW2984-NA2-CR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TW2984-NA2-CR reliable?
The price and inventory of TW2984-NA2-CR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TW2984-NA2-CR is usually 5 days.
3.What payment methods are accepted for TW2984-NA2-CR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TW2984-NA2-CR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TW2984-NA2-CR?
TW2984-NA2-CR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TW2984-NA2-CR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TW2984-NA2-CR?
For technical support, including TW2984-NA2-CR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TW2984-NA2-CR requirements.
6.How does Aetrix verify that TW2984-NA2-CR is sourced from the original manufacturer or authorized distributors?
All TW2984-NA2-CR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TW2984-NA2-CR meets industry standards.
7.What is the process for return or replacement of TW2984-NA2-CR?
All TW2984-NA2-CR units undergo pre-shipment inspection (PSI). If there is an issue with TW2984-NA2-CR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TW2984-NA2-CR part is unused and in its original packaging.
Return procedure for TW2984-NA2-CR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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