Texas Instruments TXS0102DCTRE4
- Part No.:
- TXS0102DCTRE4
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
TXS0102DCTRE4.pdf
- Description:
- 2-BIT BIDIRECTIONAL VOLTAGE-LEVE
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TXS0102DCTRE4 from Texas Instruments is a 2-bit bidirectional voltage-level translator for mixed-voltage I/O interfacing, supporting 1.65V–3.6V on A port and 2.3V–5.5V on B port with no direction-control signal required. It delivers up to 24Mbps push-pull data rate and integrates 10kΩ pull-up resistors per I/O, enabling direct connection to I²C, SMBus, and GPIO buses in embedded microcontroller systems.
For engineers reviewing the TXS0102DCTRE4 datasheet, TXS0102DCTRE4 pinout, TXS0102DCTRE4 application, or TXS0102DCTRE4 equivalent, this device is selected for low-power, auto-directional level translation between 1.8V/2.5V/3.3V and 5V domains-especially where board space, BOM count, and power sequencing flexibility are critical.
Technical Context
The TXS0102DCTRE4 employs a pass-gate architecture with edge-rate accelerator (one-shot) circuitry to detect and speed up rising edges on either port, enabling high-speed bidirectional translation without direction control. Its gate bias is set ~1 VT above the lower supply rail, allowing seamless data flow in both directions.
VCC isolation ensures both ports enter high-impedance state if either VCCA or VCCB is at GND, and Ioff support enables partial power-down operation. The OE input (referenced to VCCA) controls global 3-state mode with 200ns enable/disable timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| A-port voltage range | 1.65V to 3.6V - supports 1.8V/2.5V/3.3V logic domains while tracking VCCA |
| B-port voltage range | 2.3V to 5.5V - enables interface to 3.3V/5V peripherals without external level-shifting components |
| Max data rate (push-pull) | 24Mbps - sufficient for high-speed I²C Fast-mode Plus (1Mbps) and UART interfaces |
| Max data rate (open-drain) | 2Mbps - compatible with standard I²C (400kHz) and SMBus (100kHz) bus speeds |
| Integrated pull-ups | 10kΩ per I/O (A to VCCA, B to VCCB) - eliminates need for external resistors in open-drain applications |
| OE input reference | VCCA-referenced active-high enable - simplifies control logic when A-side is the system controller domain |
| Quiescent current | 14.4µA typical (ICCA + ICCB) - enables use in battery-powered and always-on sensor nodes |
Pinout & Package
TXS0102DCTRE4 uses the DCT package: 8-pin SSOP (2.95mm × 4mm), RoHS-compliant, lead-free, with exposed pad not present. Pin functions are validated per TI SCES640L (Rev. January 2026).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1, A2 | I/O (A-side) | Bidirectional data pins referenced to VCCA; auto-sense direction; include internal 10kΩ pull-up to VCCA |
| B1, B2 | I/O (B-side) | Bidirectional data pins referenced to VCCB; auto-sense direction; include internal 10kΩ pull-up to VCCB |
| GND | Ground | Common reference for both ports; required for proper pass-gate bias and ESD path |
| OE | Input (active high) | Global output-enable referenced to VCCA; drives all I/Os into high-impedance when low |
| VCCA | Power (A port) | Supplies A-side logic and internal circuitry; must be ≤ VCCB and within 1.65V–3.6V |
| VCCB | Power (B port) | Supplies B-side logic and internal pull-ups; must be ≥ VCCA and within 2.3V–5.5V |
Key Features
| Feature | Design Value |
|---|---|
| No direction-control signal | Eliminates MCU GPIO overhead and PCB routing complexity for bidirectional buses like I²C |
| VCC isolation | Prevents back-powering and latch-up during power sequencing faults-critical for hot-plug and multi-rail systems |
| No power-supply sequencing required | Either VCCA or VCCB may ramp first, simplifying PMIC design and reducing startup validation effort |
| Ioff partial power-down | Enables safe I/O retention during sleep modes without leakage-induced bus contention or false wakeups |
| ESD robustness (B port) | ±8kV HBM protects 5V-side interfaces against handling damage in manufacturing and field service |
Applications
| I²C Bus Translation | SMBus System Management |
|---|---|
|
Use Scenario: Interfacing a 3.3V microcontroller I²C master to 5V temperature sensors and EEPROMs on the same bus. IC Role / Device Role: Bidirectional voltage translator enabling shared SDA/SCL lines across voltage domains without bus arbitration conflicts. Use Value: Eliminates external MOSFET translators and pull-up resistor networks-reducing BOM count by 6 components per channel and saving 3.5mm² PCB area. |
Use Scenario: Connecting a 1.8V baseband processor to 3.3V power-management ICs (PMICs) via SMBus in mobile platforms. IC Role / Device Role: Level-shifting transceiver maintaining SMBus timing compliance (tBUF, tHD;STA) across voltage boundaries. Use Value: Internal 10kΩ pull-ups meet SMBus specification requirements without external components, ensuring reliable clock stretching and ACK timing. |
| GPIO Voltage Bridging | UART Signal Translation |
|
Use Scenario: Extending GPIO-controlled LEDs and buttons from a 2.5V FPGA I/O bank to 5V industrial actuators and indicators. IC Role / Device Role: Auto-directional buffer translating control signals and status returns over shared bidirectional lines. Use Value: Supports push-pull and open-drain drive modes natively-enabling single-line GPIO toggling without direction register management. |
Use Scenario: Isolating UART TX/RX paths between a 3.3V SoC and legacy 5V RS-232 transceivers in gateway devices. IC Role / Device Role: Asymmetric voltage translator preserving signal integrity for full-duplex asynchronous serial communication. Use Value: 24Mbps push-pull capability exceeds 3Mbps UART requirements, ensuring margin for clock tolerance and jitter. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional voltage translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0102RGTR | Active-drive push-pull outputs; no integrated pull-ups; requires external biasing for open-drain use | Better suited for high-speed, low-capacitance point-to-point links; less tolerant of bus stubs and long traces | Select when higher drive strength (>20mA) and tighter timing control are needed, and external pull-ups are acceptable |
| PCA9306DCUR | Passive FET-based; no edge acceleration; max 2Mbps open-drain only; no VCC isolation | Limited to I²C/SMBus; cannot support push-pull or asymmetric voltage combinations beyond 3.3V↔5V | Choose for cost-sensitive, low-data-rate I²C-only designs where VCC sequencing is controlled and no 1.8V↔5V translation is required |
Compared with TXS0102DCTRE4, TXB0102RGTR offers stronger drive but lacks integrated pull-ups and VCC isolation, while PCA9306DCUR provides lower quiescent current but omits push-pull support and fails under unbalanced power sequencing-making TXS0102DCTRE4 optimal for mixed-mode, field-deployable systems.
Availability
TXS0102DCTRE4 is available at Aetrix Electronics and suitable for I²C bus expansion, SMBus system management, and GPIO bridging applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for TXS0102DCTRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with over 90 years of innovation in power management and signal chain technologies.
The TXS0102DCTRE4 belongs to TI's Switch-type voltage translator family, engineered specifically for auto-directional, low-power level shifting in resource-constrained embedded systems where pin count, power sequencing flexibility, and bus compatibility are critical.
FAQ
What is the maximum supported voltage difference between VCCA and VCCB for TXS0102DCTRE4?
The TXS0102DCTRE4 requires VCCA ≤ VCCB at all times, with VCCA limited to 1.65V–3.6V and VCCB to 2.3V–5.5V. The absolute maximum differential is therefore 5.5V – 1.65V = 3.85V, but operation must respect the constraint that VCCA never exceeds VCCB. This ensures correct gate-biasing of the internal pass transistors and prevents forward conduction through protection diodes.
Can TXS0102DCTRE4 translate between 1.8V and 5V logic levels?
Yes, TXS0102DCTRE4 fully supports 1.8V (A port, VCCA = 1.8V) to 5V (B port, VCCB = 5V) translation. Its architecture maintains valid VOL/VOL levels and meets timing specs across this combination, including 2Mbps open-drain and 24Mbps push-pull data rates per TI SCES640L Section 5.9.
Does TXS0102DCTRE4 require external pull-up resistors for I²C operation?
No. TXS0102DCTRE4 integrates 10kΩ pull-up resistors on both A and B ports-sufficient for standard-mode (100kHz) and fast-mode (400kHz) I²C buses. External resistors are only needed if faster rise times or stronger drive (e.g., for >400pF bus capacitance) are required, and must be placed in parallel with the internal ones.
How does the OE pin behave during power-up of TXS0102DCTRE4?
The OE pin is referenced to VCCA and must be held low (e.g., via pulldown resistor to GND) during power-up to ensure all I/Os remain in high-impedance until both supplies stabilize. TI recommends a 10kΩ pulldown; the minimum value depends on the driver's sourcing capability but must guarantee OE < 0.35×VCCA before VCCA reaches regulation.
Is TXS0102DCTRE4 compatible with hot-swap or partial-power-down scenarios?
Yes. TXS0102DCTRE4 supports partial-power-down via Ioff and VCC isolation: if either VCCA or VCCB drops to GND, all I/Os automatically enter high-impedance, preventing back-current and bus contention. This makes TXS0102DCTRE4 suitable for hot-plug modules and systems with staggered rail sequencing.
TXS0102DCTRE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- -
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Push-Pull
- Data Rate:
- 24Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-LSSOP, 8-MSOP (0.110", 2.80mm Width)
TXS0102DCTRE4 FAQ
1.How can I place an order for TXS0102DCTRE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TXS0102DCTRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TXS0102DCTRE4 reliable?
The price and inventory of TXS0102DCTRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TXS0102DCTRE4 is usually 5 days.
3.What payment methods are accepted for TXS0102DCTRE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TXS0102DCTRE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TXS0102DCTRE4?
TXS0102DCTRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TXS0102DCTRE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TXS0102DCTRE4?
For technical support, including TXS0102DCTRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TXS0102DCTRE4 requirements.
6.How does Aetrix verify that TXS0102DCTRE4 is sourced from the original manufacturer or authorized distributors?
All TXS0102DCTRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TXS0102DCTRE4 meets industry standards.
7.What is the process for return or replacement of TXS0102DCTRE4?
All TXS0102DCTRE4 units undergo pre-shipment inspection (PSI). If there is an issue with TXS0102DCTRE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TXS0102DCTRE4 part is unused and in its original packaging.
Return procedure for TXS0102DCTRE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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