Texas Instruments TXS0104VBQAR
- Part No.:
- TXS0104VBQAR
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
TXS0104VBQAR.pdf
- Description:
- FOUR-BIT BIDIRECTIONAL LEVEL SHI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TXS0104VBQAR from Texas Instruments is a 4-bit bidirectional voltage-level translator optimized for open-drain and push-pull logic interfaces between mismatched voltage domains - supporting 1.65V–3.6V on A-port (VCCA) and 2.3V–5.5V on B-port (VCCB), with no direction-control signal required, 24Mbps max data rate in push-pull mode, and integrated 10kΩ pullups on both ports. It enables reliable level-shifting in mobile SoC-to-peripheral interconnects such as I²C, SMBus, and GPIO expansion.
For engineers reviewing the TXS0104VBQAR datasheet, TXS0104VBQAR pinout, TXS0104VBQAR application, or TXS0104VBQAR equivalent, key selection considerations include its dual-rail operation without sequencing constraints, OE-controlled high-impedance state referenced to VCCA, latch-up immunity (>100mA), and differential ESD robustness (±5000V HBM on B-port).
Technical Context
The TXS0104VBQAR implements a pass-gate architecture with edge-rate accelerator one-shots per channel to enhance low-to-high transition speed - critical for maintaining signal integrity at up to 24Mbps in push-pull mode. Each I/O pair includes matched internal 10kΩ pullup resistors (to VCCA on A-side, VCCB on B-side), eliminating external components in standard open-drain configurations.
Its OE input is powered solely by VCCA and asserts high-impedance on all channels when low; power-up behavior tolerates arbitrary VCCA/VCCB ramp order, though operational use mandates VCCA ≤ VCCB. The device supports bidirectional translation across 1.8V/2.5V/3.3V/5V nodes without direction control or external biasing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCA Range | 1.65V to 3.6V - defines minimum logic-high threshold and supply for OE input and A-port I/Os; must be ≤ VCCB. |
| VCCB Range | 2.3V to 5.5V - sets B-port output swing and pullup target; enables interface to 3.3V/5V peripherals without level-shifter ICs. |
| Max Data Rate | 24Mbps (push-pull), 2Mbps (open-drain) - determines usable bandwidth for high-speed GPIO or clocked serial links. |
| Propagation Delay (tPHL/tPLH) | 2.4–7ns (push-pull, VCCA=3.3V/VCCB=5V) - ensures sub-10ns timing margins for 100MHz+ clock domains. |
| ESD Rating (B-port) | ±5000V HBM - provides robustness against handling discharge in handheld assembly and field-replaceable modules. |
| Output Enable (OE) | VCCA-referenced input - allows system-level power gating of translation paths without requiring separate OE rail. |
| Supply Current (ICCA + ICCB) | 15µA typical - enables always-on level translation in battery-powered sleep modes without significant quiescent drain. |
Pinout & Package
TXS0104VBQAR uses the BQA package: 12-pin WQFN (3mm × 2.5mm), thermally enhanced with exposed pad connected to GND. Pin count and layout match industry-standard 4-bit translators for drop-in compatibility in space-constrained mobile PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1–A4 | I/O (VCCA-referenced) | Bidirectional data lines for low-voltage side (e.g., 1.8V SoC GPIO); each includes 10kΩ internal pullup to VCCA. |
| B1–B4 | I/O (VCCB-referenced) | Bidirectional data lines for higher-voltage side (e.g., 3.3V sensor or display interface); each includes 10kΩ internal pullup to VCCB. |
| VCCA | Power Supply | Supplies A-port I/Os and OE input; must be ≤ VCCB; no sequencing dependency during power-up. |
| VCCB | Power Supply | Supplies B-port I/Os; accepts 2.3V–5.5V; enables direct interfacing to legacy 5V peripherals. |
| GND | Reference | Common ground reference for both ports; thermal pad must be soldered to PCB ground plane for thermal reliability. |
| OE | Enable Input | Active-high enable referenced to VCCA; drives all I/Os into high-Z when low - used for bus isolation or power management. |
Key Features
| Feature | Design Value |
|---|---|
| No direction-control signal | Enables true bidirectional translation on shared buses (e.g., I²C SDA) without MCU GPIO overhead or timing-critical control logic. |
| Integrated 10kΩ pullups | Eliminates four external resistors per port in open-drain applications - reduces BOM count, PCB area, and layout complexity. |
| Edge-rate accelerator circuitry | One-shot PMOS boost per channel cuts rise time by >50% vs passive translators - sustains 24Mbps push-pull performance with clean edges. |
| VCCA/VCCB sequencing independence | Allows flexible power architecture design - e.g., VCCB can ramp before VCCA in multi-rail systems without latch-up or damage risk. |
| High-impedance OE control | Provides deterministic bus isolation during reset or sleep states; OE referenced to VCCA simplifies control from low-voltage domain. |
Applications
| Mobile Device I²C Expansion | SoC-to-Display Interface |
|---|---|
Use Scenario: Connecting a 1.8V application processor's I²C controller to a 3.3V display timing controller in smartphones and tablets. IC Role / Device Role / Timing Role: Bidirectional level translator for SDA/SCL lines, preserving I²C timing budgets and open-drain semantics. Use Value: Eliminates need for discrete MOSFET-based translators or dual-supply buffers - reduces component count and improves signal fidelity at 400kHz–1MHz speeds. |
Use Scenario: Interfacing a 2.5V SoC GPIO bank to a 5V touch controller or backlight driver in compact handhelds. IC Role / Device Role / Timing Role: Voltage-domain bridge enabling push-pull or open-drain signaling with sub-10ns propagation delay. Use Value: Supports fast GPIO toggling (e.g., PWM dimming control) while maintaining noise margin and ESD resilience on the 5V side. |
| Industrial Sensor Hub | USB-C Ancillary Signal Translation |
Use Scenario: Level-shifting UART and interrupt lines between a 3.3V microcontroller and mixed-voltage sensors (1.8V temp, 5V pressure) in portable test equipment. IC Role / Device Role / Timing Role: Multi-voltage I/O translator with independent A/B rails and OE-controlled isolation during firmware updates. Use Value: Enables single-chip support for heterogeneous sensor voltages - avoids multiple discrete translators and simplifies firmware GPIO mapping. |
Use Scenario: Translating CC line status signals and VCONN control between a 1.8V USB-C controller and 3.3V power delivery IC in laptop docking stations. IC Role / Device Role / Timing Role: Low-latency, bidirectional translator compliant with USB-C specification timing requirements for CC detection. Use Value: Meets <100ns enable/disable timing (ten/tdis = 200/250ns) and supports hot-plug robustness via ±5000V B-port HBM rating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0104RUTR | Active-drive push-pull architecture (no internal pullups); requires external biasing for open-drain use; higher drive strength (±20mA). | Better suited for high-speed push-pull-only links (e.g., SPI, UART); not recommended for native I²C without external pullups. | Select TXB0104RUTR when driving capacitive loads >30pF or requiring stronger output drive; TXS0104VBQAR remains optimal for I²C/open-drain. |
| SN74AVC4T245RTER | Direction-controlled (DIR pin required); no integrated pullups; supports 1.2V–3.6V on both sides; lower ESD (±2000V HBM). | Requires MCU GPIO for DIR control; lacks automatic bidirectionality - unsuitable for shared-bus protocols like I²C without software coordination. | Choose SN74AVC4T245RTER only when direction is static or controlled externally; TXS0104VBQAR eliminates DIR logic and saves board space. |
Compared with TXB0104RUTR and SN74AVC4T245RTER, TXS0104VBQAR uniquely combines automatic bidirectionality, integrated pullups, and asymmetric rail support - making it the only option that natively satisfies I²C timing, open-drain semantics, and mixed-voltage peripheral interfacing without external components or control pins.
Availability
TXS0104VBQAR is available at Aetrix Electronics and suitable for mobile handset, tablet, and industrial sensor hub designs requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for TXS0104VBQAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in interface solutions for consumer, industrial, and automotive markets.
The TXS0104V family was engineered specifically for low-power, space-constrained bidirectional level translation in mobile and portable electronics - prioritizing integration (internal pullups), ease-of-use (no DIR pin), and robustness (asymmetric ESD, sequencing tolerance).
FAQ
What voltage ranges does the TXS0104VBQAR support on its A-port and B-port?
The TXS0104VBQAR supports 1.65V to 3.6V on the A-port (VCCA) and 2.3V to 5.5V on the B-port (VCCB). VCCA must be ≤ VCCB during normal operation, but the device tolerates any power-up sequence order. This enables translation between common logic families including 1.8V SoCs and 3.3V/5V peripherals without external components - a core capability confirmed in TI's SCES964 datasheet Section 5.3.
Does the TXS0104VBQAR require an external direction-control signal?
No, the TXS0104VBQAR operates without a direction-control signal due to its pass-gate architecture with edge-rate accelerators. Data flows bidirectionally based on relative voltage levels at A and B ports - making it ideal for I²C, SMBus, and other shared-bus protocols. This feature is explicitly stated in the "Features" section of the official datasheet and distinguishes TXS0104VBQAR from direction-controlled alternatives like SN74AVC4T245RTER.
What is the maximum data rate supported by the TXS0104VBQAR in push-pull mode?
The TXS0104VBQAR supports up to 24Mbps in push-pull mode, verified under conditions of VCCA = 2.5V ± 0.2V and VCCB = 5V ± 0.5V (Section 5.9, SCES964). This performance is enabled by integrated one-shot accelerators that reduce rise time - critical for high-speed GPIO or clocked interfaces where timing margins are tight. Open-drain mode is limited to 2Mbps.
How does the OE pin function on the TXS0104VBQAR, and what is its voltage reference?
The OE (output-enable) pin on the TXS0104VBQAR is referenced to VCCA and places all A- and B-port I/Os into high-impedance state when driven low. Its enable time (ten) and disable time (tdis) are both 200ns/250ns respectively, measured across –40°C to 85°C. For safe power-up behavior, OE must be pulled low via a resistor to GND until both VCCA and VCCB are stable - a requirement detailed in Section 7.3.4 and Figure 4-4 of the datasheet.
Are there internal pullup resistors on the TXS0104VBQAR, and if so, what values and connections do they have?
Yes, the TXS0104VBQAR integrates 10kΩ pullup resistors on all eight I/O lines: A1–A4 pull to VCCA, and B1–B4 pull to VCCB. These eliminate external resistors in standard open-drain applications like I²C. If faster rise times are needed, external pullups can be added in parallel - but doing so lowers effective resistance and may affect VOH, as quantified in Equation 1 of Section 8.2.2 in the datasheet.
TXS0104VBQAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 4
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Push-Pull, Tri-State
- Data Rate:
- 24Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-WFQFN Exposed Pad
TXS0104VBQAR FAQ
1.How can I place an order for TXS0104VBQAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TXS0104VBQAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TXS0104VBQAR reliable?
The price and inventory of TXS0104VBQAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TXS0104VBQAR is usually 5 days.
3.What payment methods are accepted for TXS0104VBQAR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TXS0104VBQAR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TXS0104VBQAR?
TXS0104VBQAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TXS0104VBQAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TXS0104VBQAR?
For technical support, including TXS0104VBQAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TXS0104VBQAR requirements.
6.How does Aetrix verify that TXS0104VBQAR is sourced from the original manufacturer or authorized distributors?
All TXS0104VBQAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TXS0104VBQAR meets industry standards.
7.What is the process for return or replacement of TXS0104VBQAR?
All TXS0104VBQAR units undergo pre-shipment inspection (PSI). If there is an issue with TXS0104VBQAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TXS0104VBQAR part is unused and in its original packaging.
Return procedure for TXS0104VBQAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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