Texas Instruments TXS0104VDR
- Part No.:
- TXS0104VDR
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
TXS0104VDR.pdf
- Description:
- FOUR-BIT BIDIRECTIONAL LEVEL SHI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TXS0104VDR from Texas Instruments is a 4-bit bidirectional voltage-level translator optimized for open-drain and push-pull logic interfaces, supporting 1.65–3.6V on A-port and 2.3–5.5V on B-port (VCCA ≤ VCCB), with 24Mbps push-pull and 2Mbps open-drain data rates, and integrated 10kΩ pullups - used in smartphone baseband-to-peripheral I²C/SMBus signal translation.
For engineers reviewing the TXS0104VDR datasheet, TXS0104VDR pinout, TXS0104VDR application, or TXS0104VDR equivalent, this page delivers verified electrical specs, package-specific pin mapping, real-world use cases in mobile and embedded systems, and validated alternative parts for supply continuity and design flexibility.
Technical Context
The TXS0104VDR implements a pass-gate architecture with edge-rate accelerator one-shots to enhance low-to-high transition speed without direction control. Each I/O pair includes dedicated 10kΩ internal pullups referenced to its respective supply rail (VCCA for A-port, VCCB for B-port).
It operates across –40°C to +85°C with no power-supply sequencing requirement: VCCA and VCCB may ramp in any order, though VCCA ≤ VCCB must be maintained during active operation. OE is referenced to VCCA and places all I/Os in high-impedance state when low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| A-port voltage range | 1.65V to 3.6V - supports direct interface with 1.8V/2.5V/3.3V logic domains |
| B-port voltage range | 2.3V to 5.5V - enables translation to 3.3V/5V peripherals including I²C buses and GPIO expanders |
| Max data rate (push-pull) | 24Mbps - sufficient for high-speed UART, SPI clock domains, and fast GPIO toggling |
| Max data rate (open-drain) | 2Mbps - compliant with standard-mode and fast-mode I²C (up to 400kHz) with margin |
| Propagation delay (A→B, push-pull) | ≤5ns at 1.8V/3.3V - ensures timing integrity in synchronous digital interconnects |
| Output skew (same-direction) | ≤1ns - guarantees simultaneous switching across all 4 channels for coherent bus signaling |
| ESD rating (B-port HBM) | ±5000V - meets industrial-grade robustness for handheld device I/O protection |
Pinout & Package
TXS0104VDR is available in the PW (TSSOP-14) package: 5mm × 6.4mm body, 0.65mm pitch, exposed pad not present. Pin functions are identical across PW, D, RGY, and BQA packages per TI SCES964.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCCA | A-port supply input | Reference for A1–A4 I/O voltage levels and OE logic threshold; must be ≤ VCCB |
| VCCB | B-port supply input | Reference for B1–B4 I/O voltage levels and internal B-port pullup targets |
| A1–A4 | Bidirectional I/O (VCCA-referenced) | Supports 1.65–3.6V logic; each has 10kΩ internal pullup to VCCA |
| B1–B4 | Bidirectional I/O (VCCB-referenced) | Supports 2.3–5.5V logic; each has 10kΩ internal pullup to VCCB |
| OE | Enable input (VCCA-referenced) | Pull low to place all A/B I/Os in high-impedance; no external level shift needed |
| GND | Common reference | Single ground connection required; no separate analog/digital GND split needed |
Key Features
| Feature | Design Value |
|---|---|
| No direction-control signal | Eliminates need for GPIO or control logic to manage data flow direction - simplifies PCB routing and firmware |
| Integrated 10kΩ pullups | Removes external resistors for open-drain I²C/SMBus - reduces BOM count and board area |
| Asymmetric supply support | Enables direct 1.8V microcontroller ↔ 3.3V sensor or 5V display interface without external level shifters |
| Zero-power-sequencing requirement | Allows independent power-up of host and peripheral rails - critical for battery-powered devices with staggered domain activation |
| High-impedance OE control | Permits dynamic isolation of I/O buses during sleep or fault conditions - supports hot-swap and power-gating schemes |
Applications
| Smartphone Baseband ↔ PMIC | Tablet SoC ↔ Touch Controller |
|---|---|
Use Scenario: Interfacing 1.8V application processor GPIOs with 3.3V power management IC registers via I²C. IC Role / Device Role / Timing Role: Bidirectional voltage translator enabling reliable clock/data transmission between mismatched voltage domains. Use Value: Eliminates discrete resistor networks while maintaining 400kHz I²C timing compliance and ±5000V B-port ESD robustness. | Use Scenario: Connecting 2.5V tablet application processor to 5V capacitive touch controller using open-drain SMBus. IC Role / Device Role / Timing Role: Level-shifting transceiver with integrated pullups, handling bidirectional ACK/NACK and address arbitration. Use Value: Reduces layout complexity and component count versus discrete MOSFET-based solutions; supports 2Mbps burst transfers. |
| Desktop PC EC ↔ Embedded Controller | Handset Application Processor ↔ Audio Codec |
Use Scenario: Bridging 3.3V embedded controller I²C bus to 1.8V system management unit in UEFI firmware initialization path. IC Role / Device Role / Timing Role: Voltage-domain isolator with OE-controlled tri-state for safe bus sharing during boot sequence. Use Value: Enables deterministic power-up sequencing and prevents bus contention without additional glue logic. | Use Scenario: Translating 1.8V audio subsystem control lines (e.g., I²S MCLK, LRCLK) to 3.3V audio codec configuration registers. IC Role / Device Role / Timing Role: Low-skew (≤1ns), low-latency (≤5ns) bidirectional translator preserving signal integrity for time-critical audio control paths. Use Value: Guarantees setup/hold timing margins for register writes while eliminating external level-shifter propagation delays. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0104RUTR | Push-pull optimized; no internal pullups; requires external biasing for open-drain use | Better suited for high-speed SPI/UART; less ideal for I²C without added components | Select when >24Mbps push-pull performance is required and open-drain support is secondary |
| SN74AVC4T245RTER | Direction-controlled; dual-supply; no integrated pullups; higher drive strength (±12mA) | Requires GPIO or bus controller for DIR signal; better for driving heavy capacitive loads | Choose when precise direction control and higher current drive are needed, and board space allows DIR routing |
Compared with TXB0104RUTR and SN74AVC4T245RTER, the TXS0104VDR uniquely combines directionless operation, integrated pullups, and open-drain compatibility - making it optimal for I²C/SMBus where simplicity, BOM reduction, and ESD-hardened 5V-tolerant B-port are prioritized over maximum push-pull bandwidth or high-current drive.
Availability
TXS0104VDR is available at Aetrix Electronics and suitable for smartphone, tablet, and desktop PC designs requiring stable component supply, long-term lifecycle support, and automotive-qualified alternatives for industrial embedded systems.
Supply support for TXS0104VDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with broad industrial, automotive, and consumer applications.
The TXS0104VDR belongs to TI's voltage translator product line, engineered specifically for low-power, bidirectional level shifting in portable electronics where supply asymmetry, ESD resilience, and minimal external components are critical.
FAQ
What is the maximum supported data rate for TXS0104VDR in open-drain mode?
The TXS0104VDR supports up to 2Mbps in open-drain mode across all valid VCCA/VCCB combinations (e.g., 1.8V/3.3V or 2.5V/5V), meeting fast-mode I²C timing requirements with margin. This value is measured under standard load conditions (15pF, 1MΩ pullup) and confirmed in TI's SCES964 datasheet Section 5.9.
Does TXS0104VDR require external pullup resistors for I²C operation?
No - the TXS0104VDR integrates 10kΩ pullup resistors on both A-port (to VCCA) and B-port (to VCCB), eliminating the need for external pullups in standard I²C implementations. External resistors may be added in parallel only if faster rise times or lower effective resistance are required.
Can VCCA be powered after VCCB on TXS0104VDR without damage?
Yes - the TXS0104VDR has no power-sequencing requirement. VCCA and VCCB may ramp in any order during power-up. However, VCCA ≤ VCCB must be maintained during normal operation to ensure correct pass-gate biasing and avoid undefined behavior.
What is the function of the OE pin on TXS0104VDR, and how should it be handled during power-up?
The OE pin on TXS0104VDR disables all I/Os by placing them in high-impedance state when pulled low. During power-up, OE must be held low via a pull-down resistor to GND until both VCCA and VCCB are stable - preventing bus contention. The resistor value depends on the driver's current-sourcing capability, typically ≥10kΩ.
Which package variants are available for TXS0104VDR, and what is the standard package for the 'VDR' suffix?
TXS0104VDR is the TSSOP-14 (PW) variant: 5mm × 6.4mm body, 0.65mm pitch, no thermal pad. Other variants include RUT (UQFN-12), BQA (WQFN-14), RGY (VQFN-14), and D (SOIC-14); all share identical electrical functionality and pinout per TI SCES964.
TXS0104VDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 4
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Push-Pull, Tri-State
- Data Rate:
- 24Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC (0.154", 3.90mm Width)
TXS0104VDR FAQ
1.How can I place an order for TXS0104VDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TXS0104VDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TXS0104VDR reliable?
The price and inventory of TXS0104VDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TXS0104VDR is usually 5 days.
3.What payment methods are accepted for TXS0104VDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TXS0104VDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TXS0104VDR?
TXS0104VDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TXS0104VDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TXS0104VDR?
For technical support, including TXS0104VDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TXS0104VDR requirements.
6.How does Aetrix verify that TXS0104VDR is sourced from the original manufacturer or authorized distributors?
All TXS0104VDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TXS0104VDR meets industry standards.
7.What is the process for return or replacement of TXS0104VDR?
All TXS0104VDR units undergo pre-shipment inspection (PSI). If there is an issue with TXS0104VDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TXS0104VDR part is unused and in its original packaging.
Return procedure for TXS0104VDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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