Texas Instruments TXS0104VQBQARQ1
- Part No.:
- TXS0104VQBQARQ1
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
TXS0104VQBQARQ1.pdf
- Description:
- FOUR-BIT BIDIRECTIONAL LEVEL SHI
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TXS0104VQBQARQ1 from Texas Instruments is a 4-bit bidirectional voltage-level translator supporting open-drain and push-pull logic interfaces, with A-port supply range 1.65–3.6 V (VCCA), B-port supply range 2.3–5.5 V (VCCB), no direction-control signal required, and maximum data rates of 24 Mbps (push-pull) or 2 Mbps (open-drain). It enables reliable level shifting between 1.8 V, 2.5 V, 3.3 V, and 5 V domains in space-constrained mobile applications.
For engineers reviewing the TXS0104VQBQARQ1 datasheet, TXS0104VQBQARQ1 pinout, TXS0104VQBQARQ1 application, or TXS0104VQBQARQ1 equivalent, key selection considerations include its dual-rail operation (VCCA ≤ VCCB), integrated 10 kΩ pullups on both ports, OE-controlled high-impedance state, latch-up immunity (>100 mA), and automotive-grade qualification (Q1 suffix).
Technical Context
The TXS0104VQBQARQ1 uses a pass-gate architecture with edge-rate accelerator one-shots to boost low-to-high transitions-critical for achieving 24 Mbps push-pull performance without external direction control. Each I/O pair includes independent 10 kΩ internal pullup resistors referenced to its respective supply rail (VCCA for A-port, VCCB for B-port).
Its OE input is powered by VCCA and places all eight I/Os (A1–A4, B1–B4) into high-impedance mode when low; enable/disable timing is tightly controlled (ten = 200 ns, tdis = 250 ns). The device tolerates arbitrary power-supply sequencing and operates across –40°C to +85°C with no functional degradation under VCCA ≥ VCCB during ramp-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCA Range | 1.65 V to 3.6 V - powers A-port I/Os and OE logic; must be ≤ VCCB during operation. |
| VCCB Range | 2.3 V to 5.5 V - powers B-port I/Os; supports interfacing with 2.5 V/3.3 V/5 V systems. |
| Max Data Rate | 24 Mbps (push-pull), 2 Mbps (open-drain) - defines usable bandwidth for high-speed serial links like I²C, SMBus, or GPIO expansion. |
| Propagation Delay | 2.4–5 ns (tPHL/tPLH, push-pull, VCCA=3.3 V/VCCB=5 V) - ensures timing-critical signal integrity in synchronous interfaces. |
| ESD Rating (B Port) | ±5000 V HBM - provides robust protection against handling-induced discharge in handheld assembly environments. |
| Output Skew (tsk) | 1 ns (max) - guarantees matched switching across all four channels, essential for parallel bus translation. |
| Supply Current | 15 µA (ICCA + ICCB, typical) - enables ultra-low-power operation in battery-backed subsystems. |
Pinout & Package
TXS0104VQBQARQ1 is packaged in a 12-pin UQFN (RUT) measuring 2 mm × 1.7 mm with wettable flanks, optimized for automated optical inspection and high-density PCB layouts. The exposed thermal pad must be soldered to GND for thermal and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1–A4 | I/O (VCCA-referenced) | Bidirectional data lines for low-voltage domain (e.g., 1.8 V MCU GPIO); each includes 10 kΩ internal pullup to VCCA. |
| B1–B4 | I/O (VCCB-referenced) | Bidirectional data lines for higher-voltage domain (e.g., 3.3 V sensor interface); each includes 10 kΩ internal pullup to VCCB. |
| VCCA | Power Supply | Supplies A-port I/Os and OE input logic; must be ≤ VCCB during active operation. |
| VCCB | Power Supply | Supplies B-port I/Os; enables translation up to 5.5 V logic levels. |
| OE | Digital Input | Active-high enable; referenced to VCCA; drives all I/Os into high-Z when low. |
| GND | Ground Reference | Common return path for both supply rails and I/O signals; connects to thermal pad. |
Key Features
| Feature | Design Value |
|---|---|
| No direction-control signal | Eliminates need for external control logic or timing coordination-simplifies PCB routing and firmware design. |
| Integrated 10 kΩ pullups | Removes requirement for external resistors in open-drain applications (e.g., I²C), reducing BOM count and board area. |
| Asymmetric supply support | Enables direct bridging between disparate logic families (e.g., 1.8 V FPGA ↔ 5 V peripheral) without level-shifter IC cascading. |
| Automotive qualification (Q1) | Meets AEC-Q100 Grade 2 requirements (–40°C to +105°C junction), suitable for infotainment and ADAS subsystems. |
| Zero power-sequencing dependency | Allows VCCA or VCCB to power up first-removes startup timing constraints in multi-rail power architectures. |
Applications
| Mobile Device Interface | Automotive Infotainment |
|---|---|
|
Use Scenario: Interfacing a 1.8 V application processor GPIO bank with a 3.3 V touch controller in a smartphone. IC Role / Device Role / Timing Role: Bidirectional voltage translator enabling real-time capacitive touch reporting without signal inversion or latency penalty. Use Value: Eliminates discrete resistor networks and reduces interposer layer count-cutting PCB cost and improving EMI resilience. |
Use Scenario: Connecting a 2.5 V microcontroller I²C bus to 5 V display backlight drivers in a car head unit. IC Role / Device Role / Timing Role: Open-drain level shifter maintaining I²C protocol compliance while isolating voltage domains. Use Value: Integrated 10 kΩ pullups ensure correct bus rise time at 5 V without external components-reducing layout risk and validation effort. |
| Industrial Sensor Hub | Wearable Health Monitor |
|
Use Scenario: Translating SPI signals between a 3.3 V host MCU and 1.8 V MEMS accelerometer in a factory-floor sensor node. IC Role / Device Role / Timing Role: Push-pull translator preserving full-duplex SPI timing margins at >10 MHz clock rates. Use Value: 24 Mbps capability supports oversampling and burst-mode data acquisition-improving measurement resolution without added latency. |
Use Scenario: Bridging a 1.8 V Bluetooth SoC UART to a 3.3 V ECG analog front-end in a compact wearable patch. IC Role / Device Role / Timing Role: Low-quiescent-current bidirectional translator enabling always-on physiological monitoring. Use Value: 15 µA combined supply current extends battery life beyond 7 days in continuous-sensing mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0104RGER | Requires direction-control signal; supports push-pull only; higher ICC (≈40 µA); no integrated pullups. | Better suited for unidirectional high-speed buses (e.g., SPI master-slave) where direction is static and external pullups exist. | Select TXB0104RGER only if direction control is available and lower propagation delay (<2 ns) is critical-TXS0104VQBQARQ1 remains preferred for I²C or dynamic bidirectional use. |
| SN74AVC4T245RTER | Direction-controlled; supports wider VCCA/VCCB ranges (1.2–3.6 V / 1.2–3.6 V); no integrated pullups; higher drive strength (±12 mA). | Optimized for high-current GPIO expansion in industrial PLCs-not qualified for automotive use. | Choose SN74AVC4T245RTER when driving heavy capacitive loads (>30 pF) or operating below 1.65 V; TXS0104VQBQARQ1 is superior for Q1-compliant, low-power, open-drain designs. |
Compared with TXB0104RGER and SN74AVC4T245RTER, TXS0104VQBQARQ1 uniquely combines directionless operation, integrated pullups, automotive qualification, and sub-20 µA quiescent current-making it the optimal choice for space- and power-constrained bidirectional interfaces in mobile and automotive electronics.
Availability
TXS0104VQBQARQ1 is available at Aetrix Electronics and suitable for smartphone interface design, automotive infotainment subsystems, and wearable health monitor development requiring stable component supply and long-term lifecycle assurance.
Supply support for TXS0104VQBQARQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with over 90 years of innovation in power management and signal chain solutions.
The TXS0104VQBQARQ1 belongs to TI's voltage-level translation portfolio, engineered specifically for automotive-qualified, low-power, bidirectional logic interfacing between mixed-voltage subsystems in safety-conscious and space-constrained applications.
FAQ
What is the function of the OE pin on the TXS0104VQBQARQ1?
The OE (output-enable) pin on the TXS0104VQBQARQ1 is an active-high digital input powered by VCCA. When pulled low, it places all eight I/Os (A1–A4, B1–B4) into a high-impedance state-effectively disconnecting both voltage domains. This feature enables dynamic bus isolation during system sleep modes or fault recovery sequences. For reliable power-up behavior, OE must be tied to GND via a pull-down resistor until both VCCA and VCCB are stable.
Does TXS0104VQBQARQ1 support 1.2 V logic on the A port?
No, TXS0104VQBQARQ1 does not support 1.2 V logic on the A port. Its specified VCCA operating range is strictly 1.65 V to 3.6 V per the datasheet's Recommended Operating Conditions. Attempting to operate below 1.65 V may result in undefined logic thresholds, increased VOL, or failure to meet timing specifications. For 1.2 V compatibility, consider TI's TXU0104 or SN74AXC4T245 families instead.
Can TXS0104VQBQARQ1 translate between 5 V and 1.8 V bidirectionally?
Yes, TXS0104VQBQARQ1 supports bidirectional translation between 5 V (on B port, VCCB = 5 V) and 1.8 V (on A port, VCCA = 1.8 V), provided VCCA ≤ VCCB is maintained. The device's architecture automatically detects signal direction-no external control is needed. At this combination, it delivers 24 Mbps push-pull throughput and maintains <5 ns propagation delay, making it suitable for high-speed GPIO bridging in mixed-voltage systems.
Is the thermal pad on TXS0104VQBQARQ1 required to be connected to ground?
Yes, the exposed thermal pad on the TXS0104VQBQARQ1 (RUT package) must be soldered to a GND plane. Per TI's datasheet Section 4.4 and Thermal Information Table 5.4, this connection is mandatory for thermal dissipation and electrical stability. Omitting the thermal pad connection risks exceeding junction temperature limits under sustained load and may cause intermittent I/O failures or reduced ESD robustness-especially in automotive ambient conditions.
How does TXS0104VQBQARQ1 handle open-drain versus push-pull signaling?
TXS0104VQBQARQ1 natively supports both: for open-drain, its integrated 10 kΩ pullups eliminate external resistors and ensure compliant rise times up to 2 Mbps; for push-pull, it achieves 24 Mbps using edge-rate accelerators that temporarily boost PMOS conduction during rising edges. The same physical I/O pins serve both modes-no configuration change is needed. Performance metrics (propagation delay, skew, drive strength) are separately characterized for each mode in Sections 5.6–5.8 of the datasheet.
TXS0104VQBQARQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 4
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Push-Pull, Tri-State
- Data Rate:
- 24Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Features:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 14-WFDFN Exposed Pad
TXS0104VQBQARQ1 FAQ
1.How can I place an order for TXS0104VQBQARQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TXS0104VQBQARQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TXS0104VQBQARQ1 reliable?
The price and inventory of TXS0104VQBQARQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TXS0104VQBQARQ1 is usually 5 days.
3.What payment methods are accepted for TXS0104VQBQARQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TXS0104VQBQARQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TXS0104VQBQARQ1?
TXS0104VQBQARQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TXS0104VQBQARQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TXS0104VQBQARQ1?
For technical support, including TXS0104VQBQARQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TXS0104VQBQARQ1 requirements.
6.How does Aetrix verify that TXS0104VQBQARQ1 is sourced from the original manufacturer or authorized distributors?
All TXS0104VQBQARQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TXS0104VQBQARQ1 meets industry standards.
7.What is the process for return or replacement of TXS0104VQBQARQ1?
All TXS0104VQBQARQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TXS0104VQBQARQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TXS0104VQBQARQ1 part is unused and in its original packaging.
Return procedure for TXS0104VQBQARQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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