Texas Instruments TXS0104VRGYR
- Part No.:
- TXS0104VRGYR
- Manufacturer:
- Texas Instruments
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
TXS0104VRGYR.pdf
- Description:
- FOUR-BIT BIDIRECTIONAL LEVEL SHI
- Quantity:
- Payment:

- Shipping:

Inventory:3,000
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Product details
Overview
TXS0104VRGYR from Texas Instruments is a 4-bit bidirectional voltage-level translator optimized for open-drain and push-pull logic interfaces, supporting 1.65V–3.6V on A port and 2.3V–5.5V on B port (VCCA ≤ VCCB), with 24Mbps push-pull data rate and integrated 10kΩ pullups per I/O - deployed in smartphone baseband-to-peripheral signal bridging.
For engineers reviewing the TXS0104VRGYR datasheet, TXS0104VRGYR pinout, TXS0104VRGYR application, or TXS0104VRGYR equivalent, this page delivers verified electrical specs, package-validated pin functions, real-world interface use cases, and two confirmed alternative translators with documented functional and application-level differences.
Technical Context
The TXS0104VRGYR uses a pass-gate architecture with edge-rate accelerator one-shots to boost low-to-high transitions, eliminating need for direction-control signals. Each I/O includes internal 10kΩ pullup resistors referenced to its respective supply rail (VCCA for A-port, VCCB for B-port).
Its OE input is powered by VCCA and places all four bidirectional channels into high-impedance state when low. No power-supply sequencing is required: VCCA or VCCB may ramp first, though VCCA ≤ VCCB must be maintained during active operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| A-port voltage range | 1.65V to 3.6V - supports 1.8V/2.5V/3.3V logic domains; must be ≤ VCCB |
| B-port voltage range | 2.3V to 5.5V - enables translation to 2.5V/3.3V/5V systems without external level shifters |
| Max data rate (push-pull) | 24Mbps - validated at VCCA = 2.5V, VCCB = 5V; enables high-speed I²C/SPI peripheral bridging |
| Max data rate (open-drain) | 2Mbps - compatible with standard-mode I²C (100kHz) and fast-mode (400kHz) with margin |
| Propagation delay (A→B, push-pull) | ≤ 5ns - measured at VCCA = 1.8V, VCCB = 5V; ensures timing-critical signal integrity |
| ESD rating (B-port HBM) | ±5000V - exceeds JEDEC JS-001 Class 3A, suitable for handheld device I/O protection |
| Supply current (ICC total) | 15µA - ultra-low quiescent draw enables always-on bridge functionality in battery-powered systems |
Pinout & Package
VQFN-14 (RGY) package: 3.5mm × 3.5mm body with exposed thermal pad (must be connected to GND); 0.5mm pitch; RoHS-compliant, lead-free finish.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| VCCA | A-port supply | Reference for A1–A4 I/Os and OE input; sets low-voltage domain (1.65V–3.6V) |
| A1–A4 | Bidirectional I/O (A-side) | Each has internal 10kΩ pullup to VCCA; no direction control needed; supports open-drain or push-pull |
| VCCB | B-port supply | Reference for B1–B4 I/Os; sets high-voltage domain (2.3V–5.5V); must be ≥ VCCA |
| B1–B4 | Bidirectional I/O (B-side) | Each has internal 10kΩ pullup to VCCB; translates signals to higher-voltage logic without external components |
| OE | Output-enable input | Referenced to VCCA; low = all I/Os in high-Z; critical for power-up isolation and bus sharing |
| GND | Ground reference | Common return for both domains; thermal pad must be soldered to GND plane for thermal performance |
Key Features
| Feature | Design Value |
|---|---|
| No direction-control signal | Enables automatic bidirectional translation - eliminates MCU GPIO overhead and routing complexity |
| Integrated 10kΩ pullups | Removes need for 8 external resistors in open-drain I²C applications, reducing BOM count and board area |
| Asymmetric supply support | Allows direct interfacing between 1.8V SoC and 3.3V sensor or 5V display interface without intermediate regulators |
| Zero-power-sequencing requirement | Permits independent power-rail bring-up in multi-rail systems - simplifies PMIC design and boot sequence |
| High-impedance OE control | Supports dynamic bus arbitration and hot-plug scenarios by disabling all channels simultaneously with single pin |
Applications
| Smartphone Baseband–PMIC Interface | Tablet Touch Controller Bridge |
|---|---|
|
Use Scenario: Connecting 1.8V application processor GPIOs to 3.3V power-management IC registers over I²C. IC Role / Device Role / Timing Role: Bidirectional level shifter enabling clock/data translation while preserving I²C timing margins and open-drain behavior. Use Value: Eliminates external pullups and direction logic; maintains 400kHz I²C compliance with <5ns propagation skew across all 4 lines. |
Use Scenario: Interfacing 2.5V touch controller ASIC to 3.3V system memory and host processor via SPI. IC Role / Device Role / Timing Role: Voltage translator for MOSI/MISO/SCLK/CS signals with simultaneous push-pull and open-drain compatibility. Use Value: Supports 24Mbps SPI clocking at VCCA=2.5V/VCCB=3.3V; reduces layout congestion by integrating pullups and eliminating direction pins. |
| Handset Audio Codec Link | Desktop PC SMBus Sensor Hub |
|
Use Scenario: Bridging 1.8V audio codec control lines (I²C) to 5V system management controller in compact handset PCB. IC Role / Device Role / Timing Role: Level translator with ±5000V B-port HBM protection, ensuring robustness against ESD events near user-accessible ports. Use Value: Delivers 2Mbps open-drain I²C translation with integrated 10kΩ pullups to VCCB=5V - avoids trace-length sensitivity and improves noise immunity. |
Use Scenario: Connecting multiple 3.3V temperature/humidity sensors on SMBus to 5V motherboard EC (Embedded Controller). IC Role / Device Role / Timing Role: Multi-channel bidirectional translator enabling shared SMBus segment across voltage domains with OE-controlled isolation. Use Value: Allows hot-swap of sensor modules without bus contention; OE pin enables firmware-controlled channel disable during diagnostics or reset. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage-level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXB0104RGER | Push-pull optimized; no internal pullups; requires external direction control; 100Mbps max rate | Better suited for high-speed SPI/UART where direction is static; not recommended for I²C | Select TXB0104RGER only when full-duplex push-pull speed >24Mbps is required and direction is fixed |
| SN74AVC4T245RTER | Direction-controlled; dual-supply (1.2V–3.6V); no integrated pullups; 32Mbps max rate | Requires GPIO for DIR pin; lacks open-drain acceleration; lower ESD (±2000V HBM on both sides) | Choose SN74AVC4T245RTER when precise direction control is acceptable and cost is prioritized over integration |
Compared with TXS0104VRGYR, TXB0104RGER offers higher speed but adds direction-pin overhead and removes open-drain optimization, while SN74AVC4T245RTER trades ESD robustness and auto-bidirectional operation for broader VCC range and lower unit cost - making TXS0104VRGYR optimal for space-constrained, I²C-centric portable designs.
Availability
TXS0104VRGYR is available at Aetrix Electronics and suitable for smartphone, tablet, and embedded industrial HMI applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant VQFN packaging.
Supply support for TXS0104VRGYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with decades of expertise in interface ICs and power-efficient signal conditioning.
The TXS0104V product line targets low-power, space-constrained portable electronics requiring seamless voltage-domain bridging - specifically engineered for I²C, SMBus, and GPIO expansion in battery-operated devices.
FAQ
What is the maximum supported data rate for TXS0104VRGYR in open-drain mode?
The TXS0104VRGYR supports up to 2Mbps in open-drain mode across all valid VCCA/VCCB combinations, including 1.8V/2.5V, 1.8V/3.3V, and 1.8V/5V configurations - sufficient for standard- and fast-mode I²C without timing violations or external acceleration circuitry.
Can TXS0104VRGYR operate with VCCA = 3.3V and VCCB = 2.5V?
No - TXS0104VRGYR requires VCCA ≤ VCCB at all times during operation. With VCCA = 3.3V, VCCB must be set to 3.3V or 5.0V (within 2.3V–5.5V range). A 3.3V-to-2.5V translation violates the absolute requirement and risks latch-up or undefined behavior.
Is the thermal pad on the RGY package required to be connected to ground?
Yes - the exposed thermal pad on the TXS0104VRGYR RGY package must be soldered to a GND plane. This connection provides essential thermal dissipation (RθJB = 28.4°C/W) and electrical stability; floating or unconnected pads degrade reliability and may cause parametric drift under load.
Does TXS0104VRGYR require external pullup resistors for I²C operation?
No - TXS0104VRGYR integrates 10kΩ pullup resistors on both A- and B-ports, fully supporting standard I²C bus operation without external components. External pullups are only needed if faster rise times or stronger drive strength are required beyond the internal 10kΩ value.
How does the OE pin behave during power-up when VCCA and VCCB ramps are asynchronous?
The OE pin is referenced to VCCA, so it remains inactive until VCCA stabilizes. To ensure high-impedance state at power-up, OE must be pulled low via an external resistor to GND - TI specifies minimum resistance based on driver sourcing capability, typically 10kΩ–100kΩ depending on upstream driver strength.
TXS0104VRGYR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 4
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Push-Pull, Tri-State
- Data Rate:
- 24Mbps
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-VFQFN Exposed Pad
TXS0104VRGYR FAQ
1.How can I place an order for TXS0104VRGYR through Aetrix?
Please submit a Request for Quotation (RFQ) for TXS0104VRGYR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TXS0104VRGYR reliable?
The price and inventory of TXS0104VRGYR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TXS0104VRGYR is usually 5 days.
3.What payment methods are accepted for TXS0104VRGYR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TXS0104VRGYR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TXS0104VRGYR?
TXS0104VRGYR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TXS0104VRGYR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TXS0104VRGYR?
For technical support, including TXS0104VRGYR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TXS0104VRGYR requirements.
6.How does Aetrix verify that TXS0104VRGYR is sourced from the original manufacturer or authorized distributors?
All TXS0104VRGYR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TXS0104VRGYR meets industry standards.
7.What is the process for return or replacement of TXS0104VRGYR?
All TXS0104VRGYR units undergo pre-shipment inspection (PSI). If there is an issue with TXS0104VRGYR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TXS0104VRGYR part is unused and in its original packaging.
Return procedure for TXS0104VRGYR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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