Texas Instruments UCC21220AD
- Part No.:
- UCC21220AD
- Manufacturer:
- Texas Instruments
- Category:
- Isolators - Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
UCC21220AD.pdf
- Description:
- DGTL ISO 3KV 2CH GATE DVR 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:990
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UCC21220AD from Texas Instruments is a dual-channel, functional-isolated gate driver IC designed for high-noise industrial power stages. It delivers 4A peak source and 6A peak sink output current per channel, features >125 V/ns common-mode transient immunity (CMTI), 33ns typical propagation delay, and operates across –40°C to 150°C junction temperature. It drives MOSFETs and GaNFETs in PFC, isolated DC/DC, and synchronous rectification circuits.
For engineers reviewing the UCC21220AD datasheet, UCC21220AD pinout, UCC21220AD application, or UCC21220AD equivalent, this page provides verified technical context on isolation architecture, UVLO thresholds (5V rising), SOIC-16 narrow-body package constraints, and dual-channel timing matching critical for half-bridge and high-side configurations in server PSUs and solar inverters.
Technical Context
The UCC21220AD implements functional isolation via an internal capacitive barrier separating primary-side logic (INA, INB, DIS, VCCI, GND) from two independent secondary-side driver domains (VDDA/OUTA/VSSA and VDDB/OUTB/VSSB). Its input stage accepts TTL/CMOS-compatible signals with 2.3V high-threshold and 1V low-threshold, while active pulldown clamps outputs below 2V when unpowered.
Each channel supports independent 5V UVLO (rising threshold 6.0V ±0.3V), 25V max VDD drive supply, and achieves <5ns pulse-width distortion with matched propagation delays (≤5ns mismatch over –40°C to +150°C). The device enables parallel operation of both outputs for doubled drive strength in heavy-load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Output Current | 4A source / 6A sink per channel - enables fast switching of high-Qg GaNFETs and Si MOSFETs in high-frequency PFC stages |
| Propagation Delay | 33ns typical - ensures tight timing control in <1MHz isolated DC/DC converters |
| CMTI | >125 V/ns - maintains signal integrity during fast dV/dt transients in 800V+ DC-link systems |
| VDD UVLO Threshold | 6.0V rising (±0.3V) - prevents unreliable gate drive during brownout in 12V–24V auxiliary supplies |
| Junction Temperature Range | –40°C to 150°C - supports operation in sealed telecom brick and solar optimizer enclosures |
| Package | Narrow-body SOIC-16 - provides 4mm creepage/clearance for reinforced insulation in IEC 62368-1 designs |
| Pulse-Width Distortion | ≤5ns - minimizes shoot-through risk in half-bridge topologies with asymmetric dead-time requirements |
Pinout & Package
Narrow-body SOIC-16 (D) package with reinforced galvanic isolation barrier separating primary and secondary sides. Pin 1–8 constitute the input/control side; pins 9–16 serve the isolated output/power side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 INA | Input A | TTL/CMOS-compatible control signal for channel A; internally pulled low if floating - requires tie-to-ground for noise immunity |
| 2 INB | Input B | TTL/CMOS-compatible control signal for channel B; internally pulled low if floating - requires tie-to-ground for noise immunity |
| 3, 8 VCCI | Primary-Side Supply | 3–5.5V logic supply; decoupled locally to GND - powers input logic and isolator transmitter |
| 4 GND | Primary Ground | Reference for all primary-side signals; must be separated from secondary grounds by ≥4mm creepage |
| 5 DIS | Disable Input | Active-high shutdown of both outputs; internally pulled high - tie low to enable, bypass with 1nF capacitor near µC interface |
| 10 OUTB | Output B | Isolated gate drive output for high-side or low-side FET; sinks up to 6A - connects directly to gate of B-channel device |
| 11 VDDB | Secondary Supply B | 6.5–25V bias for channel B output stage; decoupled to VSSB - sets UVLO trip point and drive strength |
| 14 VSSA | Secondary Ground A | Return path for channel A output; electrically isolated from GND and VSSB - defines local reference for OUTA |
| 15 OUTA | Output A | Isolated gate drive output for high-side or low-side FET; sources up to 4A - connects directly to gate of A-channel device |
| 16 VDDA | Secondary Supply A | 6.5–25V bias for channel A output stage; decoupled to VSSA - sets UVLO trip point and drive strength |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel functional isolation | Capacitive barrier enables independent high-side/low-side or half-bridge operation without shared ground references |
| Configurable topology support | Can operate as dual low-side, dual high-side, or half-bridge driver - no external components required for reconfiguration |
| Active pulldown protection | Clamps OUTA/OUTB below 2V when VDDA/VDDB are unpowered - prevents unintended FET turn-on during startup/brownout |
| Matched propagation delays | ≤5ns inter-channel delay mismatch over full temperature range - enables precise dead-time control in synchronous rectifiers |
| Integrated disable function | Single DIS pin simultaneously disables both outputs with <2µs response - simplifies fault-handling in overcurrent events |
Applications
| Server Power Supplies | Solar Power Optimizers |
|---|---|
Use Scenario: High-density 48V–12V intermediate bus converters in rack-mounted servers requiring >96% efficiency at 500kHz switching. IC Role / Device Role / Timing Role: Dual-channel gate driver controlling synchronous rectifier FETs in LLC resonant topology with adaptive dead-time control. Use Value: 4A/6A drive strength reduces conduction losses in 3.3mΩ GaNFETs; >125V/ns CMTI suppresses false triggering from 10kV/µs bus transients. |
Use Scenario: Module-level power electronics (MLPE) in residential PV arrays where each panel requires independent MPPT and rapid shutdown compliance. IC Role / Device Role / Timing Role: Functional-isolated half-bridge driver enabling bidirectional energy flow between panel and DC bus under variable irradiance. Use Value: 5V UVLO ensures reliable start-up from weak auxiliary supplies; SOIC-16 creepage meets UL 1741 SB rapid shutdown spacing requirements. |
| Telecom Brick Converters | Industrial Motor Drives |
Use Scenario: 3kW 48V input telecom rectifiers operating in harsh EMI environments with frequent line surges and conducted noise. IC Role / Device Role / Timing Role: Dual low-side driver for active clamp forward primary switches and synchronous rectifier secondary switches. Use Value: 33ns propagation delay enables precise phase-shifted PWM; 150°C junction rating supports operation in sealed 85°C ambient enclosures. |
Use Scenario: Compact servo drives for collaborative robots requiring compact 24V–48V inverters with integrated safety shutdown. IC Role / Device Role / Timing Role: Half-bridge driver for three-phase inverter legs with hardware-level DIS-triggered fault shutdown. Use Value: Active pulldown clamps gates during power loss; DIS pin response <2µs meets SIL-2 functional safety timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC21220D | 8V VDD UVLO rising threshold (vs. 6V in UCC21220AD); identical pinout, timing, and isolation specs | Better suited for 12V auxiliary rails with wide tolerance; less tolerant of 5V–7V brownout conditions | Select UCC21220D when system uses stable 12V bias and requires higher UVLO hysteresis (0.6V vs. 0.3V) |
| Si8239AD-IS | 3.3V/5V input-compatible; 4A/6A drive; 5kVRMS isolation; but only 35V max VDD and no active pulldown | Limited to ≤35V gate drive; lacks active pulldown - requires external gate clamp for safe unpowered operation | Choose Si8239AD-IS only for cost-sensitive 24V systems where active pulldown is implemented externally |
Compared with UCC21220D and Si8239AD-IS, the UCC21220AD offers optimal trade-off for 5V-biased industrial converters: its 6V UVLO enables robust operation from marginal auxiliary supplies, while active pulldown eliminates need for external gate clamps - reducing BOM count and PCB area in space-constrained telecom and solar modules.
Availability
UCC21220AD is available at Aetrix Electronics and suitable for server power supplies, solar power optimizers, and telecom brick converters requiring stable component supply with guaranteed long-term manufacturability and traceable sourcing.
Supply support for UCC21220AD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in high-reliability power conversion solutions.
The UCC21220AD belongs to TI's UCC21220 family of isolated gate drivers engineered for high-efficiency, high-power-density AC/DC and DC/DC systems demanding robust noise immunity and flexible topology configuration.
FAQ
What is the UVLO threshold for the VDD supply on the UCC21220AD?
The UCC21220AD features a 5V UVLO version with a nominal VDD rising threshold of 6.0V (±0.3V) and falling threshold of 5.7V (±0.3V), providing 0.3V hysteresis. This ensures reliable gate drive activation only after the secondary-side supply stabilizes above 6.0V, preventing erratic switching during power-up sequences in 12V auxiliary rail systems.
How does the UCC21220AD achieve high noise immunity in high-dV/dt environments?
The UCC21220AD achieves >125 V/ns common-mode transient immunity (CMTI) through a proprietary capacitive isolation barrier and differential input architecture. Its internal layout minimizes coupling paths between primary and secondary sides, validated per VDE 0884-17 and UL 1577 standards - enabling reliable operation in 800V DC-link solar inverters and 48V server PSUs with fast-switching GaNFETs.
Can the UCC21220AD drive both high-side and low-side FETs in a half-bridge configuration?
Yes, the UCC21220AD supports half-bridge operation natively: OUTA and OUTB can be configured as high-side and low-side drivers respectively, with independent VDDA and VDDB supplies referenced to their respective floating grounds (VSSA and VSSB). No external level-shifting circuitry is required, and inter-channel delay matching remains ≤5ns across temperature.
What happens to the outputs of the UCC21220AD when the VDD supply drops below UVLO?
When either VDDA or VDDB falls below its UVLO falling threshold (5.7V), the corresponding output (OUTA or OUTB) is actively pulled down to <2V within <2µs. This active pulldown protection prevents unintended FET turn-on during brownout conditions - a critical safety feature for synchronous rectifiers and motor drives where gate floating could cause shoot-through.
Is the UCC21220AD pin-compatible with other devices in the UCC21220 family?
Yes, the UCC21220AD shares identical SOIC-16 (D) package, pinout, and functional interface with UCC21220D and UCC21220ADR. The only difference is the VDD UVLO threshold (6.0V vs. 8.5V), making them drop-in replacements in layouts where the auxiliary supply voltage and noise margin align with the selected UVLO version.
UCC21220AD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Last Time Buy
- Technology:
- Capacitive Coupling
- Number of Channels:
- 2
- Voltage - Isolation:
- 3000Vrms
- Common Mode Transient Immunity (Min):
- 100V/ns
- Propagation Delay tpLH / tpHL (Max):
- 40ns, 40ns
- Pulse Width Distortion (Max):
- 5.5ns
- Rise / Fall Time (Typ):
- 5ns, 6ns
- Current - Output High, Low:
- -
- Current - Peak Output:
- 4A, 6A
- Voltage - Forward (Vf) (Typ):
- -
- Current - DC Forward (If) (Max):
- -
- Voltage - Output Supply:
- 6V ~ 18V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
- Approval Agency:
- CQC, UL, VDE
UCC21220AD FAQ
1.How can I place an order for UCC21220AD through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC21220AD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC21220AD reliable?
The price and inventory of UCC21220AD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC21220AD is usually 5 days.
3.What payment methods are accepted for UCC21220AD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC21220AD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC21220AD?
UCC21220AD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC21220AD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC21220AD?
For technical support, including UCC21220AD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC21220AD requirements.
6.How does Aetrix verify that UCC21220AD is sourced from the original manufacturer or authorized distributors?
All UCC21220AD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC21220AD meets industry standards.
7.What is the process for return or replacement of UCC21220AD?
All UCC21220AD units undergo pre-shipment inspection (PSI). If there is an issue with UCC21220AD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC21220AD part is unused and in its original packaging.
Return procedure for UCC21220AD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UCC21220AD Tags
-
TLP152(TPL,E
Toshiba Semiconductor and Storage

-
HT0740LG-G
Microchip Technology

-
FOD8314TR2
onsemi

-
1EDI60N12AFXUMA1
Infineon Technologies

-
1EDB7275FXUMA1
Infineon Technologies

-
UCC5350MCDR
Texas Instruments

-
2EDB7259KXUMA1
Infineon Technologies

-
UCC5304DWVR
Texas Instruments

-
SI8261BBC-C-ISR
Skyworks Solutions Inc.

-
HT0440LG-G
Microchip Technology

-
HCPL-0302-500E
Broadcom Limited

-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
