My Inquiry
My Account
Texas Instruments UCC23313DWYR
- Part No.:
- UCC23313DWYR
- Manufacturer:
- Texas Instruments
- Category:
- Isolators - Gate Drivers
- Package:
- 6-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
UCC23313DWYR.pdf
- Description:
- DGTL ISO 3.75KV 1CH GT DVR 6SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,033
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
UCC23313DWYR from Texas Instruments is a single-channel, opto-compatible isolated gate driver with 3.75-kVRMS basic isolation, 4.5-A source / 5.3-A sink peak output current, and rail-to-rail output stage. It drives IGBTs, SiC MOSFETs, and silicon MOSFETs in high-noise industrial power stages including motor drives and solar inverters.
For engineers reviewing the UCC23313DWYR datasheet, UCC23313DWYR pinout, UCC23313DWYR application, or UCC23313DWYR equivalent, this page delivers verified specs including 105-ns max propagation delay, 150-kV/μs CMTI, 8.5-mm creepage/clearance, 12-V UVLO option, and SO-6 package compatibility with legacy optocoupler layouts.
Technical Context
The UCC23313DWYR uses an emulated diode (e-diode) input stage coupled with dual-series HV SiO₂ capacitors for galvanic isolation-eliminating LED aging and enabling –40°C to +150°C junction operation. Its OOK modulation scheme transmits digital signals across the barrier without optical components.
It supports unipolar (VCC = 15 V, VEE = GND) or bipolar (e.g., VCC = 15 V, VEE = –8 V) output supplies up to 33 V total, enabling robust gate control for IGBTs and SiC FETs. Input reverse polarity tolerance up to 13 V enables interlock architectures without external protection diodes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Isolation Rating | 3.75-kVRMS for 1 min (UL 1577); 6000-VPK surge (DIN V VDE 0884-11) |
| Peak Output Current | 4.5 A source / 5.3 A sink - sufficient to drive 1200-V SiC MOSFETs with <100-ns switching |
| Propagation Delay | ≤105 ns - enables >1-MHz PWM operation with tight timing control |
| CMTI | ≥150 kV/μs - maintains signal integrity in fast-switching 650-V+ inverter half-bridges |
| UVLO Threshold | 12.5 V (rising), 11.5 V (falling) - prevents erratic gate drive during brownout conditions |
| Package | Stretched SO-6 (7.5 mm × 4.68 mm) with >8.5-mm creepage/clearance - meets IEC 60664-1 Pollution Degree 2 |
| Operating Temperature | –40°C to +150°C TJ - supports compact heatsink designs in motor drives and UPS systems |
Pinout & Package
UCC23313DWYR is housed in a stretched SO-6 package (7.5 mm × 4.68 mm) with >8.5-mm creepage and clearance, mold compound Group I (CTI >600 V), and internal SiO₂ capacitive isolation barrier.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ANODE (Pin 1) | Input anode | Forward-biased to activate e-diode; accepts 3.3 V/5 V/12 V logic via series resistor |
| NC (Pin 2) | No connection | Internally unconnected; may be left floating or tied to GND for mechanical stability |
| CATHODE (Pin 3) | Input cathode | Reference for input forward current; reverse bias up to 13 V supported for interlock |
| VEE (Pin 4) | Negative output supply | Sinks gate current; used for negative turn-off bias in bipolar configurations |
| VOUT (Pin 5) | Gate-drive output | Rail-to-rail output driving gate of power FET; low impedance (<0.36 V drop @ 20 mA sink) |
| VCC (Pin 6) | Positive output supply | Supplies output stage; 10–33 V range supports IGBT (15 V/–8 V) and SiC (20 V/–5 V) biasing |
Key Features
| Feature | Design Value |
|---|---|
| e-Diode input stage | Eliminates LED aging; enables >50-year isolation barrier life and stable IF across –40°C to +150°C |
| Capacitive isolation barrier | Dual-series SiO₂ dielectric provides 150-kV/μs CMTI and eliminates optocoupler timing drift |
| Pin-to-pin optocoupler replacement | SO-6 footprint matches industry-standard 4N25/HCPL-3120 layouts-no PCB redesign required |
| Bipolar gate drive support | VCC–VEE up to 33 V allows –5 V to –8 V turn-off bias for SiC/IGBT Miller immunity |
| Interlock-ready input | 13-V reverse voltage rating on ANODE/CATHODE enables direct cross-conduction prevention |
Applications
| Industrial Motor Drives | Solar Inverters |
|---|---|
Use Scenario: Driving 650-V/1200-V IGBTs or SiC MOSFETs in three-phase inverter legs with >20-kHz PWM. IC Role / Device Role / Timing Role: Isolated gate driver providing noise-immune, low-skew turn-on/turn-off control across high dV/dt switching nodes. Use Value: 25-ns part-to-part skew and 35-ns pulse width distortion enable precise dead-time control and reduced THD. |
Use Scenario: Controlling H-bridge and NPC topologies in string inverters operating at 40–100 kHz with 1500-V DC bus. IC Role / Device Role / Timing Role: High-CMTI isolated driver ensuring reliable gate control despite >50-kV/μs common-mode transients from fast SiC switching. Use Value: 150-kV/μs CMTI prevents false triggering during bus transients, improving system uptime and reducing EMI filter cost. |
| Industrial UPS Systems | Induction Heating |
Use Scenario: Bidirectional switching in online double-conversion UPS with IGBT-based rectifier/inverter stages. IC Role / Device Role / Timing Role: Dual-supply capable gate driver delivering ±15 V gate bias to ensure safe zero-crossing commutation and soft-start sequencing. Use Value: 33-V max VCC–VEE supports bipolar operation without external level shifters, simplifying auxiliary supply design. |
Use Scenario: Driving resonant half-bridge LLC or Class D amplifiers at 20–500 kHz with high peak currents. IC Role / Device Role / Timing Role: Fast-propagation isolated driver synchronizing gate edges to minimize conduction loss and thermal stress on GaN/SiC switches. Use Value: 105-ns max propagation delay ensures sub-100-ns timing alignment across paralleled devices in multi-kW heating modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si8271BD-IS | 3.75-kVRMS, 4-A/6-A peak, 100-ns propagation, capacitive isolation, 5-V input logic | Requires 5-V logic input; lacks e-diode's 12-V reverse tolerance and interlock readiness | Preferred where 5-V MCU interface is fixed and bipolar gate bias not needed |
| ACPL-332J-500E | 3.75-kVRMS, 2.5-A/2.5-A peak, 500-ns propagation, LED-based optocoupler, SO-6 | Higher propagation delay, lower CMTI (25 kV/μs), limited to 105°C max TJ | Acceptable only for low-frequency (<20 kHz), low-noise applications with relaxed thermal budgets |
Compared with Si8271BD-IS and ACPL-332J-500E, UCC23313DWYR delivers superior timing precision (105 ns vs. 100/500 ns), higher reverse input tolerance (13 V vs. 5 V/0 V), and extended temperature capability (+150°C vs. +125°C/+105°C), making it optimal for high-reliability, high-frequency industrial power conversion.
Availability
UCC23313DWYR is available at Aetrix Electronics and suitable for industrial motor drives, solar inverters, and induction heating systems requiring stable component supply, long-lifecycle assurance, and certified isolation performance.
Supply support for UCC23313DWYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability isolation and power stage control.
The UCC23313DWYR belongs to TI's opto-compatible isolated gate driver family, engineered specifically for replacing aging optocouplers in demanding industrial power applications while maintaining layout compatibility and enhancing reliability.
FAQ
What is the maximum recommended VCC–VEE supply voltage for UCC23313DWYR?
The absolute maximum VCC–VEE rating for UCC23313DWYR is 35 V, but the recommended operating range is 10 V to 33 V. Operating at 33 V enables full bipolar gate drive capability-for example, +15 V/–18 V or +20 V/–13 V configurations-critical for reliable SiC MOSFET turn-off and Miller immunity. Exceeding 33 V risks violating safety insulation limits and degrading long-term barrier reliability.
Does UCC23313DWYR require an external input power supply?
No, UCC23313DWYR does not require an external input power supply. Its e-diode input stage operates solely on forward current (IF) injected between ANODE and CATHODE pins. A series resistor sets IF within the 7–16 mA recommended range using standard 3.3 V, 5 V, or 12 V logic sources-eliminating the need for isolated input rails or level shifters.
Can UCC23313DWYR drive both high-side and low-side FETs?
Yes, UCC23313DWYR can drive both high-side and low-side power FETs. Its galvanically isolated architecture decouples input and output grounds, allowing placement on either side of a half-bridge. When used high-side, VEE connects to the switch node and VCC to a floating bias rail; for low-side, VEE ties to system GND. The 33-V output supply range supports both configurations.
What is the significance of the 13-V reverse voltage rating on the UCC23313DWYR input stage?
The 13-V reverse voltage rating on UCC23313DWYR's ANODE–CATHODE terminals enables robust interlock circuitry without external clamping diodes. In complementary gate driver pairs, one input can be held reverse-biased at up to 12 V while the other is active-preventing shoot-through during fault conditions and supporting fail-safe dead-time enforcement in motor control and UPS systems.
How does UCC23313DWYR achieve its 150-kV/μs CMTI specification?
UCC23313DWYR achieves ≥150-kV/μs CMTI through differential, dual-series HV SiO₂ capacitors forming the isolation barrier-providing inherent common-mode rejection-and optimized receiver front-end design that rejects fast transients. This is validated per JEDEC JESD22-A114 with 1500-V CMTI pulses at 25°C, ensuring reliable operation in noisy 650-V+ inverter environments where competing optocouplers typically deliver <50-kV/μs.
UCC23313DWYR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Capacitive Coupling
- Number of Channels:
- 1
- Voltage - Isolation:
- 3750Vrms
- Common Mode Transient Immunity (Min):
- 150kV/µs
- Propagation Delay tpLH / tpHL (Max):
- 105ns, 105ns
- Pulse Width Distortion (Max):
- 35ns
- Rise / Fall Time (Typ):
- 28ns, 25ns (Max)
- Current - Output High, Low:
- 4.5A, 5.3A
- Current - Peak Output:
- 4.5A, 5.3A
- Voltage - Forward (Vf) (Typ):
- 2.1V
- Current - DC Forward (If) (Max):
- 16 mA
- Voltage - Output Supply:
- 14V ~ 33V
- Grade:
- -
- Qualification:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-SOIC
- Approval Agency:
- CQC, UL, VDE
UCC23313DWYR FAQ
1.How can I place an order for UCC23313DWYR through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC23313DWYR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC23313DWYR reliable?
The price and inventory of UCC23313DWYR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC23313DWYR is usually 5 days.
3.What payment methods are accepted for UCC23313DWYR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC23313DWYR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC23313DWYR?
UCC23313DWYR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC23313DWYR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC23313DWYR?
For technical support, including UCC23313DWYR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC23313DWYR requirements.
6.How does Aetrix verify that UCC23313DWYR is sourced from the original manufacturer or authorized distributors?
All UCC23313DWYR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC23313DWYR meets industry standards.
7.What is the process for return or replacement of UCC23313DWYR?
All UCC23313DWYR units undergo pre-shipment inspection (PSI). If there is an issue with UCC23313DWYR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC23313DWYR part is unused and in its original packaging.
Return procedure for UCC23313DWYR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
UCC23313DWYR Tags
.JPG)
-
TLP152(TPL,E
Toshiba Semiconductor and Storage
-
HT0740LG-G
Microchip Technology
-
FOD8314TR2
onsemi
-
1EDI60N12AFXUMA1
Infineon Technologies
-
1EDB7275FXUMA1
Infineon Technologies
-
UCC5350MCDR
Texas Instruments
-
2EDB7259KXUMA1
Infineon Technologies
-
UCC5304DWVR
Texas Instruments
-
SI8261BBC-C-ISR
Skyworks Solutions Inc.
-
HT0440LG-G
Microchip Technology
-
HCPL-0302-500E
Broadcom Limited
-
STGAP2HSCMTR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
