Texas Instruments UCC28019DR
- Part No.:
- UCC28019DR
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
UCC28019DR.pdf
- Description:
- IC PFC CTRLR CCM 65KHZ 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
UCC28019DR from Texas Instruments is an 8-pin continuous conduction mode (CCM) active Power Factor Correction (PFC) controller for boost topology converters. It delivers fixed 65-kHz switching, 97% maximum duty cycle, and operates across universal AC input (85–265 VAC) in 100 W to >2 kW systems. Its average current mode control enables low-distortion input current shaping without line voltage sensing.
For engineers reviewing the UCC28019DR datasheet, UCC28019DR pinout, UCC28019DR application, or UCC28019DR equivalent, this controller is selected for high-efficiency server PSUs, telecom rectifiers, and industrial PFC pre-regulators where precise output voltage regulation (±2% reference), integrated OVP/UVD/OLP protection, and low-standby-current operation (<2.9 mA) are critical.
Technical Context
The UCC28019DR implements dual-loop control: an inner current loop using transconductance amplifier (gmi = 0.95 mS typ.) with ISENSE input for average inductor current sensing, and an outer voltage loop using gmv = 42 µS transconductance amplifier referenced to a trimmed 5.00 V internal reference. It uses fixed-frequency PWM with leading-edge blanking and cycle-by-cycle peak current limiting at –1.08 V on ISENSE.
Protection logic includes input brown-out detection (VINS thresholds: 1.5 V enable / 0.82 V disable), open-loop detection (VSENSE < 0.82 V), output over-voltage (5.25 V) and under-voltage (4.75 V) thresholds, and soft-start initiated by VCOMP ramping with –30 µA sourcing current until VSENSE reaches 95% of regulation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switching frequency | 65 kHz fixed (±5% at 25°C); places fundamental and 2nd harmonic EMI below EN55022 150-kHz limit. |
| Max duty cycle | 97%; supports wide input/output voltage ratios in CCM boost designs up to 2 kW. |
| Voltage reference | 5.00 V ±2% (–40°C to 125°C); enables accurate output regulation across global AC mains (85–265 VAC). |
| GATE drive capability | 2.0-A sink / 1.5-A source; directly drives MOSFET gates without external buffers in typical PFC applications. |
| Standby current | 2.1 mA typ. at VSENSE = 0.5 V; enables low-power user-controlled standby mode via VSENSE pin. |
| UVLO thresholds | VCC turn-on = 10.5 V, turn-off = 9.5 V (1.0 V hysteresis); ensures clean startup and shutdown under bias supply variation. |
| ISENSE protection | Peak current limit at –1.08 V, soft over-current at –0.73 V; prevents inductor saturation and sustained overload. |
Pinout & Package
UCC28019DR is housed in an SOIC-8 (D) package with standard 1.27 mm pitch, RoHS-compliant, lead-free finish. Thermal resistance θJA = 160°C/W at TA = 25°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Ground reference | Primary return path for all internal circuits and external compensation networks; must be low-impedance PCB plane. |
| ICOMP (Pin 2) | Current loop compensation output | Transconductance amplifier output; capacitor to GND sets current loop bandwidth and stability; disables controller if V<0.6 V. |
| ISENSE (Pin 3) | Inductor current sense input | Accepts negative voltage from sense resistor; implements cycle-by-cycle PCL (–1.08 V) and soft OC (–0.73 V) with 300 ns leading-edge blanking. |
| VINS (Pin 4) | Input AC voltage sense | Detects rectified line voltage via resistor divider; enables brown-out protection (disable at 0.82 V, re-enable at 1.5 V) independent of VCC UVLO. |
| VCOMP (Pin 5) | Voltage loop compensation output | Transconductance voltage error amplifier output; RC network sets outer loop response; soft-start ramps VCOMP linearly until VSENSE ≥95% of regulation. |
| VSENSE (Pin 6) | Output voltage feedback input | Monitors PFC output via resistor divider; triggers OVP (5.25 V), UVD (4.75 V), OLP/standby (0.82 V), and EDR activation (≤95% VREF). |
| VCC (Pin 7) | Bias supply input | Requires external regulated auxiliary supply (not bootstrap); UVLO enables at 10.5 V, disables at 9.5 V; 0.1 µF ceramic decoupling mandatory. |
| GATE (Pin 8) | MOSFET gate driver output | Push-pull driver with 2.0-A sink / 1.5-A source; clamped at 12.5 V; rise/fall times ≤60/40 ns into 4.7 nF load. |
Key Features
| Feature | Design Value |
|---|---|
| No line voltage sensing required | Average current mode control eliminates need for AC line sensing resistors, reducing BOM count and improving reliability. |
| Integrated protection suite | Combines input brown-out, output OVP/UVD, open-loop detection, soft over-current, and cycle-by-cycle peak current limiting in one IC. |
| Enhanced Dynamic Response (EDR) | Activates when VSENSE falls below 95% VREF, injecting extra current into VCOMP to accelerate recovery from load transients. |
| User-controllable standby | Pulling VSENSE below 0.77 V forces low-power standby mode (IVCC ≈ 2.1 mA), enabling system-level power management. |
| Trimmed oscillator and reference | 65 kHz fSW accuracy ±5% and 5.00 V VREF ±2% over –40°C to 125°C ensure stable regulation without external calibration. |
Applications
| Server Power Supplies | Telecom Rectifiers |
|---|---|
|
Use Scenario: 1 kW+ ATX or redundant server PSUs requiring >98% efficiency and Class D harmonic compliance per IEC 61000-3-2. IC Role / Device Role / Timing Role: Primary PFC controller in boost pre-regulator stage; regulates 380–400 V DC bus while shaping sinusoidal input current. Use Value: Fixed 65-kHz operation avoids EMI filter resonance issues; 97% max duty cycle accommodates wide input range without control loop instability. |
Use Scenario: -48 V telecom rectifier systems with universal AC input and strict hold-up time requirements. IC Role / Device Role / Timing Role: Active PFC front-end controller driving discrete MOSFETs in continuous conduction mode boost converter. Use Value: Integrated OVP (5.25 V) and UVD (4.75 V) protect downstream DC-DC stages; low 2.1 mA standby current supports energy-efficient idle modes. |
| Industrial Motor Drives | Medical Power Systems |
|
Use Scenario: Variable-frequency drive (VFD) front-ends needing robust PFC under unbalanced or distorted utility voltage. IC Role / Device Role / Timing Role: CCM PFC controller with independent IBOP (VINS-based) ensuring operation only within safe RMS input window. Use Value: Input brown-out detection (0.82 V disable / 1.5 V re-enable) prevents overheating during low-line conditions without relying on VCC UVLO. |
Use Scenario: UL/IEC 60601-1 compliant medical AC-DC power supplies requiring fail-safe protection and low leakage. IC Role / Device Role / Timing Role: Safety-critical PFC controller with open-loop detection (VSENSE pull-down) and no-power discharge path on VCOMP. Use Value: Internal 100 nA VSENSE pull-down ensures immediate shutdown on feedback disconnection; VCOMP discharge path prevents latch-up during fault recovery. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CCM boost PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28070D | 6-pin, dual-phase interleaved CCM controller; higher integration but requires external current sense amplifiers and phase control logic. | Targeted at >3 kW systems needing lower ripple and thermal distribution; not drop-in compatible due to different pin count and control architecture. | Select UCC28070D only when interleaving is required; UCC28019DR remains optimal for single-phase ≤2 kW cost-sensitive designs. |
| FAN4803SMX | Fixed 65-kHz CCM controller with similar protection set but lacks VINS-based IBOP and has looser VREF tolerance (5.0 V ±3%). | Suitable for non-critical industrial applications; missing dedicated brown-out detection increases risk under marginal AC line conditions. | Choose FAN4803SMX for legacy designs or where IBOP is implemented externally; UCC28019DR provides superior line-monitoring autonomy. |
Compared with UCC28070D and FAN4803SMX, the UCC28019DR uniquely combines VINS-based brown-out protection, tighter 5.00 V ±2% reference, and SOIC-8 simplicity-making it the preferred choice for single-phase, safety-conscious, universal-input PFC designs from 100 W to 2 kW.
Availability
UCC28019DR is available at Aetrix Electronics and suitable for server power supplies, telecom rectifiers, and industrial motor drive PFC stages requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for UCC28019DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in power conversion ICs.
The UCC28019DR belongs to TI's active PFC controller product line, designed specifically for high-efficiency, universal-input, continuous conduction mode boost converters in computing, communications, and industrial power systems.
FAQ
What is the recommended VCC supply configuration for UCC28019DR?
The UCC28019DR requires an external regulated auxiliary supply-not a bootstrap-derived bias-for VCC. A minimum 0.1 µF ceramic capacitor must be placed between VCC and GND near the IC. The device starts at 10.5 V and shuts down at 9.5 V; operating current ranges from 4–10 mA under load. Using a bootstrap supply risks insufficient hold-up capacitance due to tight UVLO hysteresis.
How does UCC28019DR implement open-loop protection?
The UCC28019DR monitors VSENSE continuously: if the pin voltage drops below 0.82 V (indicating feedback loss or severe under-voltage), it disables PWM switching and enters standby mode. An internal 100 nA pull-down current actively forces VSENSE low during open-loop faults, preventing runaway duty cycle. VCOMP is also discharged to GND to ensure safe restart after fault clearance.
Can UCC28019DR operate with discontinuous conduction mode (DCM)?
No-the UCC28019DR is explicitly designed for continuous conduction mode (CCM) boost PFC operation. Its average current mode control, fixed 65-kHz frequency, and internal compensation architecture assume continuous inductor current. While light-load operation may cause boundary conduction, intentional DCM use violates the controller's design assumptions and compromises THD performance and stability.
What is the purpose of the VINS pin on UCC28019DR?
The VINS pin on UCC28019DR provides independent input AC voltage monitoring via a resistor divider from the rectified mains. It enables input brown-out protection (IBOP) with separate enable (1.5 V) and disable (0.82 V) thresholds-functioning even when VCC remains above UVLO levels. This prevents unsafe operation during low-RMS line conditions that could overheat components, adding a layer of protection beyond basic VCC UVLO.
Does UCC28019DR support programmable switching frequency?
No-UCC28019DR features an internally trimmed, fixed 65-kHz oscillator with ±5% accuracy at 25°C and ±6 kHz over –40°C to 125°C. Frequency is not adjustable via external components. This fixed-frequency design ensures predictable EMI behavior and simplifies filter design, particularly for compliance with EN55022 conducted emissions limits below 150 kHz.
UCC28019DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Mode:
- Continuous Conduction (CCM)
- Frequency - Switching:
- 65kHz
- Current - Startup:
- 100 µA
- Voltage - Supply:
- 10V ~ 21V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
UCC28019DR FAQ
1.How can I place an order for UCC28019DR through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC28019DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC28019DR reliable?
The price and inventory of UCC28019DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC28019DR is usually 5 days.
3.What payment methods are accepted for UCC28019DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC28019DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC28019DR?
UCC28019DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC28019DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC28019DR?
For technical support, including UCC28019DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC28019DR requirements.
6.How does Aetrix verify that UCC28019DR is sourced from the original manufacturer or authorized distributors?
All UCC28019DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC28019DR meets industry standards.
7.What is the process for return or replacement of UCC28019DR?
All UCC28019DR units undergo pre-shipment inspection (PSI). If there is an issue with UCC28019DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC28019DR part is unused and in its original packaging.
Return procedure for UCC28019DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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