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Texas Instruments UCC28060D
- Part No.:
- UCC28060D
- Manufacturer:
- Texas Instruments
- Category:
- PFC (Power Factor Correction)
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
UCC28060D.pdf
- Description:
- IC PFC CTRL TRANS 500KHZ 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,145
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Product details
Overview
UCC28060D from Texas Instruments is a dual-phase transition-mode (TM) power factor correction (PFC) controller in SOIC-16 package, delivering natural interleaving for 100–800 W AC/DC supplies. It features 1-A source/1.8-A sink gate drivers, –40°C to +125°C operating range, FailSafe OVP with dual-sense inputs (VSENSE and HVSEN), and input brownout detection. It enables high-efficiency PFC in LCD/Plasma TVs and computer power supplies.
For engineers reviewing the UCC28060D datasheet, UCC28060D pinout, UCC28060D application, or UCC28060D equivalent, this page delivers verified technical context on dual-phase TM control, zero-current detection thresholds (1.0 V falling / 1.68 V rising), PWM on-time scaling (KTH = 1.35 µs/V typ), thermal shutdown at +160°C, and SOIC-16 terminal mapping - all confirmed for UCC28060D specifically.
Technical Context
The UCC28060D implements Natural Interleaving™ architecture where both phases operate as independent masters synchronized to the same frequency, eliminating slave-channel mismatch and enabling inherently matched on-times (±6% over line range). Its sensorless current shaping uses ZCDA/ZCDB zero-crossing detection with clamped inputs (0–3 V) and programmable timing via TSET resistor.
System-level protection includes dual-path FailSafe OVP (triggered at VSENSE > 6.45 V or HVSEN > 4.87 V), brownout detection (VINAC < 1.39 V for 440 ms), phase-fail monitoring (PWMCNTL logic output), and thermal shutdown (+160°C) with hysteresis (+140°C restart). The error amplifier provides 96 µS transconductance and COMP output referenced to 125 mV offset for precise on-time control.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 14–21 V: powers internal circuitry and gate drivers; clamped at 24 V typical to prevent damage |
| Operating Temp | –40°C to +125°C: supports industrial and consumer power supply environments without derating |
| Gate Drive | 1-A source / 1.8-A sink: directly drives MOSFET gates without external buffers in ≤600 W designs |
| ZCD Thresholds | Falling: 1.0 V, Rising: 1.68 V: defines zero-current switching points for accurate TM boundary detection |
| OVP Trigger | VSENSE > 6.45 V or HVSEN > 4.87 V: dual-sense redundancy prevents catastrophic overvoltage from single-point failure |
| On-Time Factor | KTH = 1.35 µs/V (typ): linear scaling of PWM on-time vs COMP voltage enables predictable ramp control |
| Min Switch Period | 2.2 µs (typ): sets maximum switching frequency (~455 kHz) for EMI and efficiency trade-off optimization |
| Brownout Delay | 440 ms (typ): filters transient dips to avoid false disable during line sags in 85–265 VAC operation |
Pinout & Package
UCC28060D is housed in a 16-pin SOIC (D) package with standard JEDEC MS-012AC footprint (5.3 mm × 10.2 mm, 1.27 mm pitch), optimized for surface-mount assembly and thermal dissipation up to 890 mW at +25°C ambient.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ZCDB (1) | Zero-current detect input B | Triggers GDB turn-on when inductor current falls to zero; falling threshold = 1.0 V ensures accurate TM boundary |
| VREF (15) | 6-V reference output | Stable 6.00 V ±18 mV reference for divider networks and biasing; supports ≤2 mA load |
| GDA (14) | Phase A gate driver output | 1-A source / 1.8-A sink drive capability eliminates need for external buffer in ≤600 W boost stages |
| PGND (13) | Power ground return | Separate low-impedance path for gate driver currents to prevent noise coupling into analog circuits |
| VCC (12) | Bias supply input | Accepts 14–21 V regulated input; internal shunt clamp activates above 24 V to protect internal circuitry |
| GDB (11) | Phase B gate driver output | Matches GDA performance; enables true dual-master interleaving without master/slave latency asymmetry |
| CS (10) | Current sense input | Detects cycle-by-cycle overcurrent at –0.20 V rising threshold; blanked for 100 ns after GD edge |
| PWMCNTL (9) | Open-drain status output | Signals valid operation: low when HVSEN OK and ZCDA/ZCDB active; used for downstream converter enable |
| ZCDA (16) | Zero-current detect input A | Synchronized with ZCDB to maintain phase alignment; clamped 0–3 V protects against voltage transients |
| VSENSE (2) | Output voltage feedback | Regulates 400 VDC output via 6.00 V reference; OVP trips at 6.45 V to safeguard bulk capacitor and downstream loads |
Key Features
| Feature | Design Value |
|---|---|
| Natural Interleaving™ | Both phases operate as independent masters, ensuring inherent on-time matching (±6%) and eliminating slave-channel delay-induced ripple |
| FailSafe OVP | Dual-sense architecture (VSENSE + HVSEN) prevents overvoltage from single-component failure-critical for 400 VDC bus safety |
| Sensorless Current Shaping | ZCDA/ZCDB inputs eliminate current-sense transformer, reducing BOM cost and board area while maintaining TM accuracy |
| Inrush-Safe Limiting | Prevents MOSFET conduction during startup by holding GDA/GDB low until VINAC exceeds brownout threshold (1.39 V) |
| Phase-Fail Detection | PWMCNTL output goes high if ZCDA or ZCDB stops toggling, enabling immediate shutdown before asymmetric stress damages components |
| Thermal Protection | Shuts down at +160°C junction temperature with +20°C hysteresis; prevents thermal runaway in enclosed power supply enclosures |
Applications
| LCD/Plasma TV Power Supplies | Computer ATX Power Supplies |
|---|---|
Use Scenario: 300–600 W front-end PFC stage feeding resonant LLC or PWM DC/DC converters in flat-panel displays. IC Role / Device Role / Timing Role: Dual-phase TM PFC controller managing interleaved boost stages to reduce input filter size and EMI. Use Value: Cuts bulk capacitor ripple current by ~30% vs single-phase, enabling smaller 400 VDC capacitors and lower system cost. |
Use Scenario: Active PFC stage in 500–800 W desktop/server PSUs complying with ENERGY STAR and 80 PLUS Titanium requirements. IC Role / Device Role / Timing Role: Transition-mode controller coordinating two boost channels to maintain >95% efficiency at light load. Use Value: Achieves >92% efficiency at 20% load via natural interleaving and burst-mode operation, meeting Tier-2 efficiency mandates. |
| Entry-Level Server PSUs | Electronic Lighting Ballasts |
Use Scenario: High-reliability 600 W redundant PSU modules requiring continuous operation under variable line conditions (85–265 VAC). IC Role / Device Role / Timing Role: Dual-phase PFC controller with brownout immunity (440 ms delay) and thermal shutdown for 24/7 uptime. Use Value: Prevents unexpected shutdown during brief line sags; thermal hysteresis (+20°C) avoids cycling near thermal limit. |
Use Scenario: High-power LED driver PFC front-end for commercial lighting systems requiring THD < 10% and PF > 0.95. IC Role / Device Role / Timing Role: Transition-mode controller driving interleaved boost to minimize EMI and meet IEC 61000-3-2 Class C limits. Use Value: Reduces EMI filter component count by 40% vs CCM designs, lowering bill-of-materials and PCB area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-phase transition-mode PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28061D | Same SOIC-16 package and pinout; differs in PHB logic: UCC28061 uses fixed 2-phase mode, while UCC28060 supports dynamic phase management via PHB pin | UCC28061 lacks programmable phase-enable; unsuitable for light-load efficiency optimization requiring single-phase fallback | Select UCC28060D when adaptive phase shedding is required; choose UCC28061D only for fixed dual-phase designs |
| ICE3PCS01G | SOIC-16 but different pin assignment; no ZCDA/ZCDB inputs-uses internal valley detection; lacks FailSafe OVP dual-sense architecture | Designed for cost-sensitive consumer adapters; not rated for 800 W or industrial thermal profiles (–40°C to +125°C) | UCC28060D preferred for high-reliability, high-power, or safety-critical PFC; ICE3PCS01G fits low-cost <300 W applications |
Compared with UCC28061D and ICE3PCS01G, the UCC28060D uniquely combines natural interleaving with dynamic phase control, FailSafe OVP redundancy, and full industrial temperature support-making it the only option among the three qualified for 600–800 W server and display power supplies requiring robust fault coverage.
Availability
UCC28060D is available at Aetrix Electronics and suitable for LCD/Plasma TV power supplies, computer ATX PSUs, and entry-level server PSUs requiring stable component supply across long production lifecycles.
Supply support for UCC28060D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in power conversion and energy-efficient design.
The UCC28060D belongs to TI's high-performance PFC controller product line, engineered specifically for cost-effective, high-efficiency transition-mode PFC in 100–800 W consumer and industrial AC/DC power supplies.
FAQ
What is the primary function of the UCC28060D in a power supply design?
The UCC28060D serves as a dual-phase transition-mode power factor correction controller that manages two interleaved boost converters to achieve high efficiency, low THD, and reduced EMI in AC/DC front-ends. Its core function is to regulate the 400 VDC output bus while maintaining near-unity power factor across 85–265 VAC input. The UCC28060D performs this using natural interleaving, zero-current detection, and integrated gate drivers-eliminating the need for external controllers or complex synchronization circuitry.
How does the FailSafe OVP feature work in the UCC28060D?
The UCC28060D implements FailSafe OVP using two independent sensing paths: VSENSE monitors output voltage via a resistive divider, while HVSEN provides redundant monitoring and can also signal "power-good" to downstream converters. If either input exceeds its threshold-VSENSE > 6.45 V or HVSEN > 4.87 V-the PWM outputs shut down immediately. This dual-path architecture ensures that a single component failure (e.g., open resistor in one divider) cannot cause uncontrolled overvoltage, making the UCC28060D suitable for safety-critical 400 VDC systems.
Can the UCC28060D operate in single-phase mode, and how is it controlled?
Yes, the UCC28060D supports dynamic single-phase operation via the PHB (Phase B Enable) pin. When PHB voltage drops below 0.8 V (low-line) or 1.1 V (high-line), channel B disables and channel A's on-time doubles to maintain regulation. PHB can be tied to COMP for automatic light-load phase shedding or driven externally for custom sequencing. This capability is unique to the UCC28060D-not present in the pin-compatible UCC28061D-and directly improves light-load efficiency in variable-power applications.
What are the absolute maximum ratings for the ZCDA and ZCDB pins on the UCC28060D?
The ZCDA and ZCDB pins on the UCC28060D have absolute maximum ratings of –0.5 V to +4 V. Internally, they are clamped between 0 V and 3 V to protect against transients. Input bias current is ±0.5 µA, and the recommended series resistor limits clamping current to < ±3 mA. These specifications ensure robust zero-current detection even with noisy boost inductor waveforms-critical for reliable TM operation across temperature and line variations in the UCC28060D.
Does the UCC28060D require an external current-sense transformer for operation?
No, the UCC28060D does not require an external current-sense transformer. It uses sensorless current shaping via the CS pin, which connects directly to the current-sense resistor on the low-side of the boost diode. The device detects overcurrent at –0.20 V (rising threshold) and blanks sensing for 100 ns after each gate drive edge to reject switching noise. This architecture-confirmed in the UCC28060D datasheet-reduces component count, cost, and board space versus transformer-based solutions while maintaining accurate cycle-by-cycle protection.
UCC28060D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- Natural Interleaving™
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Mode:
- Discontinuous (Transition)
- Frequency - Switching:
- 500kHz
- Current - Startup:
- 200 µA
- Voltage - Supply:
- 8V ~ 21V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
UCC28060D FAQ
1.How can I place an order for UCC28060D through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC28060D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC28060D reliable?
The price and inventory of UCC28060D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC28060D is usually 5 days.
3.What payment methods are accepted for UCC28060D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC28060D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC28060D?
UCC28060D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC28060D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC28060D?
For technical support, including UCC28060D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC28060D requirements.
6.How does Aetrix verify that UCC28060D is sourced from the original manufacturer or authorized distributors?
All UCC28060D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC28060D meets industry standards.
7.What is the process for return or replacement of UCC28060D?
All UCC28060D units undergo pre-shipment inspection (PSI). If there is an issue with UCC28060D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC28060D part is unused and in its original packaging.
Return procedure for UCC28060D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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