Texas Instruments UCC28500DWTR

Overview

UCC28500DWTR from Texas Instruments is a dual-stage active power factor correction (PFC) and DC-DC controller IC for offline AC-DC power supplies. It integrates average-current-mode PFC control with peak-current-mode downstream PWM, supports 85–265 V_RMS universal input, delivers near-unity power factor (>0.99), and features programmable 80–120 kHz oscillator frequency, 16.5 V/10 V UVLO threshold, and dual gate drivers (GT1/GT2) with 50% max duty cycle on GT2. It is used in 100-W universal-input PFC+forward converter designs.

For engineers reviewing the UCC28500DWTR datasheet, UCC28500DWTR pinout, UCC28500DWTR application, or UCC28500DWTR equivalent, key selection criteria include its integrated PFC+PWM dual-control architecture, leading-edge PFC / trailing-edge PWM synchronization to reduce bulk capacitor ripple, line feedforward (VFF) for stable input power across 3:1 voltage range, and self-biasing capability enabling bootstrap operation without auxiliary winding.

Technical Context

The UCC28500DWTR implements a two-stage control architecture: the PFC stage uses average current-mode control with a high-linearity analog multiplier (IAC input, MOUT output), voltage amplifier (VAOUT), and leading-edge PWM modulation; the second stage employs peak-current-mode control synchronized to the PFC clock, with external error signal injection via VERR and hard-clamped 50% maximum duty cycle for transformer reset assurance.

It incorporates dedicated circuitry for coordinated start-up sequencing-holding the second stage disabled until PFC output reaches ≥90% of regulation-and includes zero-power detection (0.33 V VAOUT threshold), programmable soft-start (SS2), overvoltage protection (OVP/ENBL), and independent UVLO thresholds (16.5 V turn-on / 10 V hysteresis for VCC; 6.75 V ±1.2 V for PWM stage).

Key Specifications

Pinout & Package

UCC28500DWTR is housed in a 20-pin SOIC (DW) package with exposed thermal pad (RoHS-compliant, JEDEC MS-013). Pin assignments are fully defined in TI SLUS419C Rev. November 2001.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-stage PFC+PWM controller applications.

Compared with UCC28501DWTR and UCC28070DR, the UCC28500DWTR uniquely combines bootstrap-capable PFC control with synchronized 50%-duty PWM in one 20-pin SOIC, eliminating inter-chip propagation delay and simplifying layout for compact, high-reliability 2-stage converters.

Availability

UCC28500DWTR is available at Aetrix Electronics and suitable for server front-ends, industrial AC-DC adapters, and medical power modules requiring stable component supply, long-lifecycle support, and consistent parametric performance across production batches.

Supply support for UCC28500DWTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in power conversion IC design.

The UCC2850x product line was engineered specifically for cost-sensitive, high-efficiency two-stage AC-DC power supplies-integrating PFC and isolated DC-DC control to eliminate timing mismatches and reduce system-level BOM count.

FAQ

What is the primary function of the UCC28500DWTR in a power supply design?

The UCC28500DWTR serves as a dual-function controller that manages both the active power factor correction (PFC) boost stage and the downstream isolated DC-DC converter (e.g., forward or flyback) within a single IC. It implements average-current-mode control for the PFC stage and peak-current-mode control for the second stage, with built-in synchronization to minimize ripple and improve efficiency. This integration eliminates the need for separate controllers and reduces timing skew in UCC28500DWTR-based designs.

Does the UCC28500DWTR support universal AC input voltage ranges?

Yes, the UCC28500DWTR supports universal AC input (85–265 V_RMS) through its line feedforward (VFF) circuitry, which scales control signals proportionally to the square of the input voltage. Combined with its 16.5 V/10 V VCC UVLO and internal 7.5 V reference, it maintains stable PFC regulation and coordinated second-stage operation across the full input range without external compensation adjustments in UCC28500DWTR implementations.

How does the UCC28500DWTR handle start-up sequencing between the PFC and DC-DC stages?

The UCC28500DWTR enforces automatic start-up sequencing: the second-stage PWM (GT2) remains disabled until the PFC output voltage (monitored via VAOUT) reaches ≥90% of its regulated value. Once triggered, the SS2 pin initiates a controlled soft-start ramp. If the PFC output drops below 74% of nominal (for UCC28500 variants), both stages shut down. This behavior is intrinsic to the UCC28500DWTR silicon and requires no external logic.

Can the UCC28500DWTR be used with transformer-isolated DC-DC topologies?

Yes, the UCC28500DWTR is explicitly designed for transformer-isolated second stages. Its VERR pin accepts an externally generated error signal-typically delivered via optocoupler from the secondary side-enabling precise regulation regardless of isolation barrier. The 4.5 V internal clamp on VERR ensures GT2 duty cycle never exceeds 50%, guaranteeing safe transformer reset in forward and half-bridge configurations using UCC28500DWTR.

What is the role of the IAC and VFF pins on the UCC28500DWTR?

The IAC pin accepts a current proportional to instantaneous AC line voltage, feeding the analog multiplier. The VFF pin outputs a voltage proportional to the RMS line voltage (generated by mirroring IAC through an external RC filter), enabling feedforward control that maintains constant input power across varying line conditions. This dual-path architecture is fundamental to the UCC28500DWTR's ability to achieve near-unity power factor while minimizing component count.